[llvm] r333925 - [X86] Only accept const SelectionDAG to resolveTargetShuffleInputs/getFauxShuffleMask

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 4 09:48:13 PDT 2018


Author: rksimon
Date: Mon Jun  4 09:48:13 2018
New Revision: 333925

URL: http://llvm.org/viewvc/llvm-project?rev=333925&view=rev
Log:
[X86] Only accept const SelectionDAG to resolveTargetShuffleInputs/getFauxShuffleMask

These methods should only be using SelectionDAG for analysis (known/sign bits etc), not node creation.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=333925&r1=333924&r2=333925&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Jun  4 09:48:13 2018
@@ -6093,7 +6093,7 @@ static bool setTargetShuffleZeroElements
 // destination value type.
 static bool getFauxShuffleMask(SDValue N, SmallVectorImpl<int> &Mask,
                                SmallVectorImpl<SDValue> &Ops,
-                               SelectionDAG &DAG) {
+                               const SelectionDAG &DAG) {
   Mask.clear();
   Ops.clear();
 
@@ -6326,7 +6326,7 @@ static void resolveTargetShuffleInputsAn
 static bool resolveTargetShuffleInputs(SDValue Op,
                                        SmallVectorImpl<SDValue> &Inputs,
                                        SmallVectorImpl<int> &Mask,
-                                       SelectionDAG &DAG) {
+                                       const SelectionDAG &DAG) {
   if (!setTargetShuffleZeroElements(Op, Mask, Inputs))
     if (!getFauxShuffleMask(Op, Mask, Inputs, DAG))
       return false;




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