[PATCH] D47690: [X86][BMI][TBM] Only demand bottom 16-bits of the BEXTR control op (PR34042)

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 4 09:13:00 PDT 2018


RKSimon added a comment.

In https://reviews.llvm.org/D47690#1120998, @craig.topper wrote:

> It fails on trunk. Your patch probably fixes it by shrinking the immediate. Is there anything that can prevent the DAG combine from running that we should be concerned about? If there is we might not need to clamp the immediate in lowering or isel.


I don't think TargetLowering::SimplifyDemandedBits alters constants so I might not be repro'ing it properly - my X86ISelDAGToDAG.cpp change might be causing it to fallback to the reg-reg version?

What was the full repro command line please?


Repository:
  rL LLVM

https://reviews.llvm.org/D47690





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