[llvm] r333773 - [mips] Extend list of relocations supported by the `.reloc` directive
Simon Atanasyan via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 1 09:37:42 PDT 2018
Author: atanasyan
Date: Fri Jun 1 09:37:42 2018
New Revision: 333773
URL: http://llvm.org/viewvc/llvm-project?rev=333773&view=rev
Log:
[mips] Extend list of relocations supported by the `.reloc` directive
Supporting GOT and TLS related relocations by the `.reloc` directive is
useful for purpose of testing various tools like a linker, for example.
Modified:
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
llvm/trunk/test/MC/Mips/reloc-directive.s
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp?rev=333773&r1=333772&r2=333773&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp Fri Jun 1 09:37:42 2018
@@ -303,6 +303,40 @@ Optional<MCFixupKind> MipsAsmBackend::ge
return StringSwitch<Optional<MCFixupKind>>(Name)
.Case("R_MIPS_NONE", (MCFixupKind)Mips::fixup_Mips_NONE)
.Case("R_MIPS_32", FK_Data_4)
+ .Case("R_MIPS_GOT_PAGE", (MCFixupKind)Mips::fixup_Mips_GOT_PAGE)
+ .Case("R_MIPS_CALL_HI16", (MCFixupKind)Mips::fixup_Mips_CALL_HI16)
+ .Case("R_MIPS_CALL_LO16", (MCFixupKind)Mips::fixup_Mips_CALL_LO16)
+ .Case("R_MIPS_CALL16", (MCFixupKind)Mips::fixup_Mips_CALL16)
+ .Case("R_MIPS_GOT16", (MCFixupKind)Mips::fixup_Mips_GOT)
+ .Case("R_MIPS_GOT_PAGE", (MCFixupKind)Mips::fixup_Mips_GOT_PAGE)
+ .Case("R_MIPS_GOT_OFST", (MCFixupKind)Mips::fixup_Mips_GOT_OFST)
+ .Case("R_MIPS_GOT_DISP", (MCFixupKind)Mips::fixup_Mips_GOT_DISP)
+ .Case("R_MIPS_GOT_HI16", (MCFixupKind)Mips::fixup_Mips_GOT_HI16)
+ .Case("R_MIPS_GOT_LO16", (MCFixupKind)Mips::fixup_Mips_GOT_LO16)
+ .Case("R_MIPS_TLS_GOTTPREL", (MCFixupKind)Mips::fixup_Mips_GOTTPREL)
+ .Case("R_MIPS_TLS_DTPREL_HI16", (MCFixupKind)Mips::fixup_Mips_DTPREL_HI)
+ .Case("R_MIPS_TLS_DTPREL_LO16", (MCFixupKind)Mips::fixup_Mips_DTPREL_LO)
+ .Case("R_MIPS_TLS_GD", (MCFixupKind)Mips::fixup_Mips_TLSGD)
+ .Case("R_MIPS_TLS_LDM", (MCFixupKind)Mips::fixup_Mips_TLSLDM)
+ .Case("R_MIPS_TLS_TPREL_HI16", (MCFixupKind)Mips::fixup_Mips_TPREL_HI)
+ .Case("R_MIPS_TLS_TPREL_LO16", (MCFixupKind)Mips::fixup_Mips_TPREL_LO)
+ .Case("R_MICROMIPS_CALL16", (MCFixupKind)Mips::fixup_MICROMIPS_CALL16)
+ .Case("R_MICROMIPS_GOT_DISP", (MCFixupKind)Mips::fixup_MICROMIPS_GOT_DISP)
+ .Case("R_MICROMIPS_GOT_PAGE", (MCFixupKind)Mips::fixup_MICROMIPS_GOT_PAGE)
+ .Case("R_MICROMIPS_GOT_OFST", (MCFixupKind)Mips::fixup_MICROMIPS_GOT_OFST)
+ .Case("R_MICROMIPS_GOT16", (MCFixupKind)Mips::fixup_MICROMIPS_GOT16)
+ .Case("R_MICROMIPS_TLS_GOTTPREL",
+ (MCFixupKind)Mips::fixup_MICROMIPS_GOTTPREL)
+ .Case("R_MICROMIPS_TLS_DTPREL_HI16",
+ (MCFixupKind)Mips::fixup_MICROMIPS_TLS_DTPREL_HI16)
+ .Case("R_MICROMIPS_TLS_DTPREL_LO16",
+ (MCFixupKind)Mips::fixup_MICROMIPS_TLS_DTPREL_LO16)
+ .Case("R_MICROMIPS_TLS_GD", (MCFixupKind)Mips::fixup_MICROMIPS_TLS_GD)
+ .Case("R_MICROMIPS_TLS_LDM", (MCFixupKind)Mips::fixup_MICROMIPS_TLS_LDM)
+ .Case("R_MICROMIPS_TLS_TPREL_HI16",
+ (MCFixupKind)Mips::fixup_MICROMIPS_TLS_TPREL_HI16)
+ .Case("R_MICROMIPS_TLS_TPREL_LO16",
+ (MCFixupKind)Mips::fixup_MICROMIPS_TLS_TPREL_LO16)
.Default(MCAsmBackend::getFixupKind(Name));
}
@@ -492,6 +526,47 @@ bool MipsAsmBackend::writeNopData(raw_os
return true;
}
+bool MipsAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
+ const MCFixup &Fixup,
+ const MCValue &Target) {
+ const unsigned FixupKind = Fixup.getKind();
+ switch (FixupKind) {
+ default:
+ return false;
+ // All these relocations require special processing
+ // at linking time. Delegate this work to a linker.
+ case Mips::fixup_Mips_CALL_HI16:
+ case Mips::fixup_Mips_CALL_LO16:
+ case Mips::fixup_Mips_CALL16:
+ case Mips::fixup_Mips_GOT:
+ case Mips::fixup_Mips_GOT_PAGE:
+ case Mips::fixup_Mips_GOT_OFST:
+ case Mips::fixup_Mips_GOT_DISP:
+ case Mips::fixup_Mips_GOT_HI16:
+ case Mips::fixup_Mips_GOT_LO16:
+ case Mips::fixup_Mips_GOTTPREL:
+ case Mips::fixup_Mips_DTPREL_HI:
+ case Mips::fixup_Mips_DTPREL_LO:
+ case Mips::fixup_Mips_TLSGD:
+ case Mips::fixup_Mips_TLSLDM:
+ case Mips::fixup_Mips_TPREL_HI:
+ case Mips::fixup_Mips_TPREL_LO:
+ case Mips::fixup_MICROMIPS_CALL16:
+ case Mips::fixup_MICROMIPS_GOT_DISP:
+ case Mips::fixup_MICROMIPS_GOT_PAGE:
+ case Mips::fixup_MICROMIPS_GOT_OFST:
+ case Mips::fixup_MICROMIPS_GOT16:
+ case Mips::fixup_MICROMIPS_GOTTPREL:
+ case Mips::fixup_MICROMIPS_TLS_DTPREL_HI16:
+ case Mips::fixup_MICROMIPS_TLS_DTPREL_LO16:
+ case Mips::fixup_MICROMIPS_TLS_GD:
+ case Mips::fixup_MICROMIPS_TLS_LDM:
+ case Mips::fixup_MICROMIPS_TLS_TPREL_HI16:
+ case Mips::fixup_MICROMIPS_TLS_TPREL_LO16:
+ return true;
+ }
+}
+
MCAsmBackend *llvm::createMipsAsmBackend(const Target &T,
const MCSubtargetInfo &STI,
const MCRegisterInfo &MRI,
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h?rev=333773&r1=333772&r2=333773&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h Fri Jun 1 09:37:42 2018
@@ -85,6 +85,9 @@ public:
bool writeNopData(raw_ostream &OS, uint64_t Count) const override;
+ bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
+ const MCValue &Target) override;
+
}; // class MipsAsmBackend
} // namespace
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp?rev=333773&r1=333772&r2=333773&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp Fri Jun 1 09:37:42 2018
@@ -147,7 +147,8 @@ static unsigned getMatchingLoType(const
if (Type == ELF::R_MIPS16_HI16)
return ELF::R_MIPS16_LO16;
- if (Reloc.OriginalSymbol->getBinding() != ELF::STB_LOCAL)
+ if (Reloc.OriginalSymbol &&
+ Reloc.OriginalSymbol->getBinding() != ELF::STB_LOCAL)
return ELF::R_MIPS_NONE;
if (Type == ELF::R_MIPS_GOT16)
Modified: llvm/trunk/test/MC/Mips/reloc-directive.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/reloc-directive.s?rev=333773&r1=333772&r2=333773&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/reloc-directive.s (original)
+++ llvm/trunk/test/MC/Mips/reloc-directive.s Fri Jun 1 09:37:42 2018
@@ -23,31 +23,192 @@ foo:
nop
.reloc 12, R_MIPS_NONE # ASM: .reloc 12, R_MIPS_NONE{{$}}
nop
+ .reloc 16, R_MIPS_CALL_HI16, 4 # ASM: .reloc 16, R_MIPS_CALL_HI16, 4
+ nop
+ .reloc 20, R_MIPS_CALL_LO16, 4 # ASM: .reloc 20, R_MIPS_CALL_LO16, 4
+ nop
+ .reloc 24, R_MIPS_CALL16, 4 # ASM: .reloc 24, R_MIPS_CALL16, 4
+ nop
+ .reloc 28, R_MIPS_GOT16, 4 # ASM: .reloc 28, R_MIPS_GOT16, 4
+ nop
+ .reloc 32, R_MIPS_GOT_PAGE, 4 # ASM: .reloc 32, R_MIPS_GOT_PAGE, 4
+ nop
+ .reloc 36, R_MIPS_GOT_OFST, 4 # ASM: .reloc 36, R_MIPS_GOT_OFST, 4
+ nop
+ .reloc 40, R_MIPS_GOT_DISP, 4 # ASM: .reloc 40, R_MIPS_GOT_DISP, 4
+ nop
+ .reloc 44, R_MIPS_GOT_HI16, 4 # ASM: .reloc 44, R_MIPS_GOT_HI16, 4
+ nop
+ .reloc 48, R_MIPS_GOT_LO16, 4 # ASM: .reloc 48, R_MIPS_GOT_LO16, 4
+ nop
+ .reloc 52, R_MIPS_TLS_GOTTPREL, 4 # ASM: .reloc 52, R_MIPS_TLS_GOTTPREL, 4
+ nop
+ .reloc 56, R_MIPS_TLS_DTPREL_HI16, 4 # ASM: .reloc 56, R_MIPS_TLS_DTPREL_HI16, 4
+ nop
+ .reloc 60, R_MIPS_TLS_DTPREL_LO16, 4 # ASM: .reloc 60, R_MIPS_TLS_DTPREL_LO16, 4
+ nop
+ .reloc 64, R_MIPS_TLS_GD, 4 # ASM: .reloc 64, R_MIPS_TLS_GD, 4
+ nop
+ .reloc 68, R_MIPS_TLS_LDM, 4 # ASM: .reloc 68, R_MIPS_TLS_LDM, 4
+ nop
+ .reloc 72, R_MIPS_TLS_TPREL_HI16, 4 # ASM: .reloc 72, R_MIPS_TLS_TPREL_HI16, 4
+ nop
+ .reloc 76, R_MIPS_TLS_TPREL_LO16, 4 # ASM: .reloc 76, R_MIPS_TLS_TPREL_LO16, 4
+ nop
+ .reloc 80, R_MICROMIPS_CALL16, 4 # ASM: .reloc 80, R_MICROMIPS_CALL16, 4
+ nop
+ .reloc 84, R_MICROMIPS_GOT_DISP, 4 # ASM: .reloc 84, R_MICROMIPS_GOT_DISP, 4
+ nop
+ .reloc 88, R_MICROMIPS_GOT_PAGE, 4 # ASM: .reloc 88, R_MICROMIPS_GOT_PAGE, 4
+ nop
+ .reloc 92, R_MICROMIPS_GOT_OFST, 4 # ASM: .reloc 92, R_MICROMIPS_GOT_OFST, 4
+ nop
+ .reloc 96, R_MICROMIPS_GOT16, 4 # ASM: .reloc 96, R_MICROMIPS_GOT16, 4
+ nop
+ .reloc 100, R_MICROMIPS_TLS_GOTTPREL, 4 # ASM: .reloc 100, R_MICROMIPS_TLS_GOTTPREL, 4
+ nop
+ .reloc 104, R_MICROMIPS_TLS_DTPREL_HI16, 4 # ASM: .reloc 104, R_MICROMIPS_TLS_DTPREL_HI16, 4
+ nop
+ .reloc 108, R_MICROMIPS_TLS_DTPREL_LO16, 4 # ASM: .reloc 108, R_MICROMIPS_TLS_DTPREL_LO16, 4
+ nop
+ .reloc 112, R_MICROMIPS_TLS_GD, 4 # ASM: .reloc 112, R_MICROMIPS_TLS_GD, 4
+ nop
+ .reloc 116, R_MICROMIPS_TLS_LDM, 4 # ASM: .reloc 116, R_MICROMIPS_TLS_LDM, 4
+ nop
+ .reloc 120, R_MICROMIPS_TLS_TPREL_HI16, 4 # ASM: .reloc 120, R_MICROMIPS_TLS_TPREL_HI16, 4
+ nop
+ .reloc 124, R_MICROMIPS_TLS_TPREL_LO16, 4 # ASM: .reloc 124, R_MICROMIPS_TLS_TPREL_LO16, 4
+ nop
# OBJ-O32-LABEL: Name: .text
-# OBJ-O32: 0000: 00000000 00000000 00000008
+# OBJ-O32: 0000: 00000000 00000000 00000008 00000000
+# OBJ-O32-NEXT: 0010: 00000000 00000004 00000000 00000000
+# OBJ-O32-NEXT: 0020: 00000004 00000004 00000004 00000000
+# OBJ-O32-NEXT: 0030: 00000004 00000000 00000000 00000000
+# OBJ-O32-NEXT: 0040: 00000000 00000000 00000000 00000000
+# OBJ-O32-NEXT: 0050: 00000000 00000004 00000004 00000004
+# OBJ-O32-NEXT: 0060: 00000000 00000000 00000000 00000000
+# OBJ-O32-NEXT: 0070: 00000000 00000000 00000000 00000000
# OBJ-O32-LABEL: }
# OBJ-O32-LABEL: Relocations [
# OBJ-O32: 0x0 R_MIPS_NONE .text 0x0
-# OBJ-O32: 0x4 R_MIPS_NONE .text 0x0
-# OBJ-O32: 0x8 R_MIPS_32 .text 0x0
-# OBJ-O32: 0xC R_MIPS_NONE - 0x0
+# OBJ-O32-NEXT: 0x4 R_MIPS_NONE .text 0x0
+# OBJ-O32-NEXT: 0x8 R_MIPS_32 .text 0x0
+# OBJ-O32-NEXT: 0xC R_MIPS_NONE - 0x0
+# OBJ-O32-NEXT: 0x10 R_MIPS_CALL_HI16 - 0x0
+# OBJ-O32-NEXT: 0x14 R_MIPS_CALL_LO16 - 0x0
+# OBJ-O32-NEXT: 0x18 R_MIPS_CALL16 - 0x0
+# OBJ-O32-NEXT: 0x20 R_MIPS_GOT_PAGE - 0x0
+# OBJ-O32-NEXT: 0x24 R_MIPS_GOT_OFST - 0x0
+# OBJ-O32-NEXT: 0x28 R_MIPS_GOT_DISP - 0x0
+# OBJ-O32-NEXT: 0x2C R_MIPS_GOT_HI16 - 0x0
+# OBJ-O32-NEXT: 0x30 R_MIPS_GOT_LO16 - 0x0
+# OBJ-O32-NEXT: 0x34 R_MIPS_TLS_GOTTPREL - 0x0
+# OBJ-O32-NEXT: 0x38 R_MIPS_TLS_DTPREL_HI16 - 0x0
+# OBJ-O32-NEXT: 0x3C R_MIPS_TLS_DTPREL_LO16 - 0x0
+# OBJ-O32-NEXT: 0x40 R_MIPS_TLS_GD - 0x0
+# OBJ-O32-NEXT: 0x44 R_MIPS_TLS_LDM - 0x0
+# OBJ-O32-NEXT: 0x48 R_MIPS_TLS_TPREL_HI16 - 0x0
+# OBJ-O32-NEXT: 0x4C R_MIPS_TLS_TPREL_LO16 - 0x0
+# OBJ-O32-NEXT: 0x50 R_MICROMIPS_CALL16 - 0x0
+# OBJ-O32-NEXT: 0x54 R_MICROMIPS_GOT_DISP - 0x0
+# OBJ-O32-NEXT: 0x58 R_MICROMIPS_GOT_PAGE - 0x0
+# OBJ-O32-NEXT: 0x5C R_MICROMIPS_GOT_OFST - 0x0
+# OBJ-O32-NEXT: 0x64 R_MICROMIPS_TLS_GOTTPREL - 0x0
+# OBJ-O32-NEXT: 0x68 R_MICROMIPS_TLS_DTPREL_HI16 - 0x0
+# OBJ-O32-NEXT: 0x6C R_MICROMIPS_TLS_DTPREL_LO16 - 0x0
+# OBJ-O32-NEXT: 0x70 R_MICROMIPS_TLS_GD - 0x0
+# OBJ-O32-NEXT: 0x74 R_MICROMIPS_TLS_LDM - 0x0
+# OBJ-O32-NEXT: 0x78 R_MICROMIPS_TLS_TPREL_HI16 - 0x0
+# OBJ-O32-NEXT: 0x7C R_MICROMIPS_TLS_TPREL_LO16 - 0x0
+# OBJ-O32-NEXT: 0x1C R_MIPS_GOT16 - 0x0
+# OBJ-O32-NEXT: 0x60 R_MICROMIPS_GOT16 - 0x0
# OBJ-N32-LABEL: Name: .text
-# OBJ-N32: 0000: 00000000 00000000 00000000
+# OBJ-N32: 0000: 00000000 00000000 00000000 00000000
+# OBJ-N32-NEXT: 0010: 00000000 00000000 00000000 00000000
+# OBJ-N32-NEXT: 0020: 00000000 00000000 00000000 00000000
+# OBJ-N32-NEXT: 0030: 00000000 00000000 00000000 00000000
+# OBJ-N32-NEXT: 0040: 00000000 00000000 00000000 00000000
+# OBJ-N32-NEXT: 0050: 00000000 00000000 00000000 00000000
+# OBJ-N32-NEXT: 0060: 00000000 00000000 00000000 00000000
+# OBJ-N32-NEXT: 0070: 00000000 00000000 00000000 00000000
# OBJ-N32-LABEL: }
# OBJ-N32-LABEL: Relocations [
# OBJ-N32: 0x4 R_MIPS_NONE .text 0x0
-# OBJ-N32: 0x0 R_MIPS_NONE .text 0x4
-# OBJ-N32: 0x8 R_MIPS_32 .text 0x8
-# OBJ-N32: 0xC R_MIPS_NONE - 0x0
+# OBJ-N32-NEXT: 0x0 R_MIPS_NONE .text 0x4
+# OBJ-N32-NEXT: 0x8 R_MIPS_32 .text 0x8
+# OBJ-N32-NEXT: 0xC R_MIPS_NONE - 0x0
+# OBJ-N32-NEXT: 0x10 R_MIPS_CALL_HI16 - 0x4
+# OBJ-N32-NEXT: 0x14 R_MIPS_CALL_LO16 - 0x4
+# OBJ-N32-NEXT: 0x18 R_MIPS_CALL16 - 0x4
+# OBJ-N32-NEXT: 0x1C R_MIPS_GOT16 - 0x4
+# OBJ-N32-NEXT: 0x20 R_MIPS_GOT_PAGE - 0x4
+# OBJ-N32-NEXT: 0x24 R_MIPS_GOT_OFST - 0x4
+# OBJ-N32-NEXT: 0x28 R_MIPS_GOT_DISP - 0x4
+# OBJ-N32-NEXT: 0x2C R_MIPS_GOT_HI16 - 0x4
+# OBJ-N32-NEXT: 0x30 R_MIPS_GOT_LO16 - 0x4
+# OBJ-N32-NEXT: 0x34 R_MIPS_TLS_GOTTPREL - 0x4
+# OBJ-N32-NEXT: 0x38 R_MIPS_TLS_DTPREL_HI16 - 0x4
+# OBJ-N32-NEXT: 0x3C R_MIPS_TLS_DTPREL_LO16 - 0x4
+# OBJ-N32-NEXT: 0x40 R_MIPS_TLS_GD - 0x4
+# OBJ-N32-NEXT: 0x44 R_MIPS_TLS_LDM - 0x4
+# OBJ-N32-NEXT: 0x48 R_MIPS_TLS_TPREL_HI16 - 0x4
+# OBJ-N32-NEXT: 0x4C R_MIPS_TLS_TPREL_LO16 - 0x4
+# OBJ-N32-NEXT: 0x50 R_MICROMIPS_CALL16 - 0x4
+# OBJ-N32-NEXT: 0x54 R_MICROMIPS_GOT_DISP - 0x4
+# OBJ-N32-NEXT: 0x58 R_MICROMIPS_GOT_PAGE - 0x4
+# OBJ-N32-NEXT: 0x5C R_MICROMIPS_GOT_OFST - 0x4
+# OBJ-N32-NEXT: 0x60 R_MICROMIPS_GOT16 - 0x4
+# OBJ-N32-NEXT: 0x64 R_MICROMIPS_TLS_GOTTPREL - 0x4
+# OBJ-N32-NEXT: 0x68 R_MICROMIPS_TLS_DTPREL_HI16 - 0x4
+# OBJ-N32-NEXT: 0x6C R_MICROMIPS_TLS_DTPREL_LO16 - 0x4
+# OBJ-N32-NEXT: 0x70 R_MICROMIPS_TLS_GD - 0x4
+# OBJ-N32-NEXT: 0x74 R_MICROMIPS_TLS_LDM - 0x4
+# OBJ-N32-NEXT: 0x78 R_MICROMIPS_TLS_TPREL_HI16 - 0x4
+# OBJ-N32-NEXT: 0x7C R_MICROMIPS_TLS_TPREL_LO16 - 0x4
# OBJ-N64-LABEL: Name: .text
-# OBJ-N64: 0000: 00000000 00000000 00000000
+# OBJ-N64: 0000: 00000000 00000000 00000000 00000000
+# OBJ-N64-NEXT: 0010: 00000000 00000000 00000000 00000000
+# OBJ-N64-NEXT: 0020: 00000000 00000000 00000000 00000000
+# OBJ-N64-NEXT: 0030: 00000000 00000000 00000000 00000000
+# OBJ-N64-NEXT: 0040: 00000000 00000000 00000000 00000000
+# OBJ-N64-NEXT: 0050: 00000000 00000000 00000000 00000000
+# OBJ-N64-NEXT: 0060: 00000000 00000000 00000000 00000000
+# OBJ-N64-NEXT: 0070: 00000000 00000000 00000000 00000000
# OBJ-N64-LABEL: }
# OBJ-N64-LABEL: Relocations [
# OBJ-N64: 0x4 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x0
-# OBJ-N64: 0x0 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x4
-# OBJ-N64: 0x8 R_MIPS_32/R_MIPS_NONE/R_MIPS_NONE .text 0x8
-# OBJ-N64: 0xC R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE - 0x0
+# OBJ-N64-NEXT: 0x0 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x4
+# OBJ-N64-NEXT: 0x8 R_MIPS_32/R_MIPS_NONE/R_MIPS_NONE .text 0x8
+# OBJ-N64-NEXT: 0xC R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE - 0x0
+# OBJ-N64-NEXT: 0x10 R_MIPS_CALL_HI16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x14 R_MIPS_CALL_LO16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x18 R_MIPS_CALL16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x1C R_MIPS_GOT16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x20 R_MIPS_GOT_PAGE/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x24 R_MIPS_GOT_OFST/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x28 R_MIPS_GOT_DISP/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x2C R_MIPS_GOT_HI16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x30 R_MIPS_GOT_LO16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x34 R_MIPS_TLS_GOTTPREL/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x38 R_MIPS_TLS_DTPREL_HI16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x3C R_MIPS_TLS_DTPREL_LO16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x40 R_MIPS_TLS_GD/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x44 R_MIPS_TLS_LDM/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x48 R_MIPS_TLS_TPREL_HI16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x4C R_MIPS_TLS_TPREL_LO16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x50 R_MICROMIPS_CALL16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x54 R_MICROMIPS_GOT_DISP/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x58 R_MICROMIPS_GOT_PAGE/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x5C R_MICROMIPS_GOT_OFST/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x60 R_MICROMIPS_GOT16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x64 R_MICROMIPS_TLS_GOTTPREL/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x68 R_MICROMIPS_TLS_DTPREL_HI16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x6C R_MICROMIPS_TLS_DTPREL_LO16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x70 R_MICROMIPS_TLS_GD/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x74 R_MICROMIPS_TLS_LDM/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x78 R_MICROMIPS_TLS_TPREL_HI16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x7C R_MICROMIPS_TLS_TPREL_LO16/R_MIPS_NONE/R_MIPS_NONE - 0x4
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