[PATCH] D47477: [VPlan] Move recipe based VPlan generation to separate function.

[Florian Hahn via Phabricator via llvm-commits]

fhahn added inline comments.


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Comment at: lib/Transforms/Vectorize/LoopVectorize.cpp:6341
 
+  buildVPlansWithVPRecipes(1, MaxVF);
+  LLVM_DEBUG(printPlans(dbgs()));
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dcaballe wrote:
> Just wondering if `buildVPlans` happened before the if condition for some reason. Is it possible that we still need the VF=1 VPlan for interleaving? Not sure if there is a test covering this case. Could you please have a look? If should be easy to test using #pragma clang loop interleave.
Thanks for spotting this. I think at the moment there are some assertions making sure we only vectorize with VF > 1, but I moved the check to the original position, as for loop aware SLP it might be profitable to vectorize even if the computed VF is 1.


https://reviews.llvm.org/D47477