[llvm] r333724 - [X86] Add a test case showing a bad disassembling of an EVEX instruction with EVEX.X=0 and a GPR encoded in modrm.rm.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Thu May 31 22:12:43 PDT 2018


Author: ctopper
Date: Thu May 31 22:12:43 2018
New Revision: 333724

URL: http://llvm.org/viewvc/llvm-project?rev=333724&view=rev
Log:
[X86] Add a test case showing a bad disassembling of an EVEX instruction with EVEX.X=0 and a GPR encoded in modrm.rm.

EVEX.X is used to extended modrm.rm when the instruction encodes a XMM/YMM/ZMM register. But we aren't properly ignoring it when it encodes a GPR and we end up printing whatever registers exist in X86 register enum after the GPRs.

Modified:
    llvm/trunk/test/MC/Disassembler/X86/x86-64.txt

Modified: llvm/trunk/test/MC/Disassembler/X86/x86-64.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/x86-64.txt?rev=333724&r1=333723&r2=333724&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/x86-64.txt (original)
+++ llvm/trunk/test/MC/Disassembler/X86/x86-64.txt Thu May 31 22:12:43 2018
@@ -580,3 +580,6 @@
 # Make sure we ignore EVEX.X when the index register isn't being used.
 #CHECK: vaddps (%rax), %xmm16, %xmm1
 0x62 0xb1 0x7c 0x00 0x58 0x08
+
+#CHECK: vcvtusi2sdq %mm0, %xmm1, %xmm1
+0x62 0xb1 0xf7 0x08 0x7b 0xc8




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