[PATCH] D47569: [Power9]Legalize and emit code for quad-precision convert from single-precision

Nemanja Ivanovic via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 31 01:20:54 PDT 2018


nemanjai requested changes to this revision.
nemanjai added inline comments.
This revision now requires changes to proceed.


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Comment at: lib/Target/PowerPC/PPCInstrVSX.td:3386
+  def : Pat<(f128 (fpextend f32:$src)),
+            (f128 (XSCVDPQP (XSCPSGNDP (COPY_TO_REGCLASS $src, VSFRC),
+                                       (COPY_TO_REGCLASS $src, VSFRC))))>;
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nemanjai wrote:
> Huh? We are copying the sign of the input to itself? That seems like an unnecessary noop. Why do we need that?
Oh I see the motivation here - I imagine it's because of the code coming out of GCC. If that's the case, please remove this. We do not need to replicate this. The reason they use a copy-sign instruction is actually to move the value from the FPR into a VR (we use `xxlor`).

On a side note, the instruction they use to copy scalar values between VSR's is a bit better since it allows for more parallelism (even if it doesn't provide shorter latency). But that's for a separate patch.


https://reviews.llvm.org/D47569





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