[PATCH] D47516: AMDGPU/R600: Make sure functions are cache line aligned

[Jan Vesely via Phabricator via llvm-commits]

jvesely updated this revision to Diff 149149.
jvesely retitled this revision from "AMDGPU/R600: Make sure functions are 8 byte aligned" to "AMDGPU/R600: Make sure functions are cache line aligned".
jvesely edited the summary of this revision.
jvesely added a comment.

Change explanation to cache line alignment (p2align 3 still hangs the GPU).
Use ensure alignment


Repository:
  rL LLVM

https://reviews.llvm.org/D47516

Files:
  lib/Target/AMDGPU/R600AsmPrinter.cpp
  test/CodeGen/AMDGPU/r600.func-alignment.ll


Index: test/CodeGen/AMDGPU/r600.func-alignment.ll
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/r600.func-alignment.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+; RUN: llc < %s -march=r600 -mcpu=rs880 | FileCheck  %s
+
+; CHECK: .globl test
+; Functions need to be cacheline (256B) aligned to prevent GPU hangs
+; CHECK: .p2align 8
+; CHECK: {{^}}test:
+; CHECK: CF_END
+
+define amdgpu_ps void @test(<4 x float> inreg %reg0) {
+entry:
+  ret void
+}
+
Index: lib/Target/AMDGPU/R600AsmPrinter.cpp
===================================================================
--- lib/Target/AMDGPU/R600AsmPrinter.cpp
+++ lib/Target/AMDGPU/R600AsmPrinter.cpp
@@ -103,6 +103,10 @@
 
 bool R600AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
 
+
+  // Functions needs to be cacheline (256B) aligned.
+  MF.ensureAlignment(8);
+
   SetupMachineFunction(MF);
 
   MCContext &Context = getObjFileLowering().getContext();


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