[PATCH] D47523: [X86] Extract latency of fldz/fld1 in separate classes.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: lib/Target/X86/X86ScheduleZnver1.td:818
-// FLDZ.
-def : InstRW<[ZnWriteFPU13], (instregex "LD_F0")>;
-
----------------
courbet wrote:
> RKSimon wrote:
> > Just replace these with SchedAlias instead of entries above - that's what is mainly used in znver1
> I'm not sure what you mean.
> Getting rid of the definition for ZnWriteFPU3 and alias it to WriteFLD0 ?
> 
You can remove the X86WriteRes<WriteFLD* entries and update these existing entries here:
```
// FLDZ.
def : SchedAlias<WriteFLD0, ZnWriteFPU13>;

// FLD1.
def : SchedAlias<WriteFLD1, ZnWriteFPU3>;
```


Repository:
  rL LLVM

https://reviews.llvm.org/D47523