[llvm] r333445 - [ARM] Enable SETCCCARRY lowering for Thumb1.
Eli Friedman via llvm-commits
llvm-commits at lists.llvm.org
Tue May 29 11:17:17 PDT 2018
Author: efriedma
Date: Tue May 29 11:17:16 2018
New Revision: 333445
URL: http://llvm.org/viewvc/llvm-project?rev=333445&view=rev
Log:
[ARM] Enable SETCCCARRY lowering for Thumb1.
We've had Thumb1 support for ARMISD::SUBE for a while now, so this just
works. Reduces codesize a bit for 64-bit integer comparisons.
Differential Revision: https://reviews.llvm.org/D47387
Modified:
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
llvm/trunk/test/CodeGen/ARM/smml.ll
llvm/trunk/test/CodeGen/ARM/wide-compares.ll
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=333445&r1=333444&r2=333445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Tue May 29 11:17:16 2018
@@ -1064,9 +1064,7 @@ ARMTargetLowering::ARMTargetLowering(con
setOperationAction(ISD::SELECT_CC, MVT::f16, Custom);
}
- // Thumb-1 cannot currently select ARMISD::SUBE.
- if (!Subtarget->isThumb1Only())
- setOperationAction(ISD::SETCCCARRY, MVT::i32, Custom);
+ setOperationAction(ISD::SETCCCARRY, MVT::i32, Custom);
setOperationAction(ISD::BRCOND, MVT::Other, Custom);
setOperationAction(ISD::BR_CC, MVT::i32, Custom);
Modified: llvm/trunk/test/CodeGen/ARM/smml.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/smml.ll?rev=333445&r1=333444&r2=333445&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/smml.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/smml.ll Tue May 29 11:17:16 2018
@@ -2,7 +2,7 @@
; RUN: llc -mtriple=armv6-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-V6
; RUN: llc -mtriple=armv7-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-V6
; RUN: llc -mtriple=thumb-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-THUMB
-; RUN: llc -mtriple=thumbv6-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-THUMBV6
+; RUN: llc -mtriple=thumbv6-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-THUMB
; RUN: llc -mtriple=thumbv6t2-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-THUMBV6T2
; RUN: llc -mtriple=thumbv7-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-THUMBV6T2
; RUN: llc -mtriple=thumbv7m-eabi %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-V4
@@ -26,7 +26,6 @@ define i32 @Test1(i32 %a, i32 %b, i32 %c
;CHECK-LABEL: Test1
;CHECK-V4-NOT: smmls
;CHECK-THUMB-NOT: smmls
-;CHECK-THUMBV6-NOT: smmls
;CHECK-V6: smmls r0, [[Rn:r[1-2]]], [[Rm:r[1-2]]], r0
;CHECK-THUMBV6T2: smmls r0, [[Rn:r[1-2]]], [[Rm:r[1-2]]], r0
entry:
@@ -44,13 +43,10 @@ entry:
declare void @opaque(i32)
define void @test_used_flags(i32 %in1, i32 %in2) {
; CHECK-LABEL: test_used_flags:
-; CHECK-THUMB: cmp r1, #0
-; CHECK-THUMB: push {r2}
-; CHECK-THUMB: pop {r3}
-; CHECK-THUMB: ble
-; CHECK-THUMBV6: cmp r1, #0
-; CHECK-THUMBV6: mov r3, r2
-; CHECK-THUMBV6: ble
+; CHECK-THUMB: movs r2, #0
+; CHECK-THUMB: subs r0, r2, r0
+; CHECK-THUMB: sbcs r2, r1
+; CHECK-THUMB: bge
; CHECK-V6: smull [[PROD_LO:r[0-9]+]], [[PROD_HI:r[0-9]+]], r0, r1
; CHECK-V6: rsbs {{.*}}, [[PROD_LO]], #0
; CHECK-V6: rscs {{.*}}, [[PROD_HI]], #0
Modified: llvm/trunk/test/CodeGen/ARM/wide-compares.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/wide-compares.ll?rev=333445&r1=333444&r2=333445&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/wide-compares.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/wide-compares.ll Tue May 29 11:17:16 2018
@@ -1,25 +1,40 @@
-; RUN: llc -mtriple=armv7-unknown-linux < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-ARM %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=armv7-unknown-linux < %s | FileCheck --check-prefix=CHECK-ARM %s
; RUN: llc -mtriple=thumbv6-unknown-linux < %s | FileCheck --check-prefix=CHECK-THUMB1 %s
-; RUN: llc -mtriple=thumbv7-unknown-linux < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-THUMB2 %s
+; RUN: llc -mtriple=thumbv7-unknown-linux < %s | FileCheck --check-prefix=CHECK-THUMB2 %s
-; CHECK-THUMB1-NOT: sbc
-
-; CHECK-LABEL: test_slt1:
define i32 @test_slt1(i64 %a, i64 %b) {
+; CHECK-ARM-LABEL: test_slt1:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: subs r0, r0, r2
+; CHECK-ARM-NEXT: mov r12, #2
+; CHECK-ARM-NEXT: sbcs r0, r1, r3
+; CHECK-ARM-NEXT: movwlt r12, #1
+; CHECK-ARM-NEXT: mov r0, r12
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB1-LABEL: test_slt1:
+; CHECK-THUMB1: @ %bb.0: @ %entry
+; CHECK-THUMB1-NEXT: subs r0, r0, r2
+; CHECK-THUMB1-NEXT: sbcs r1, r3
+; CHECK-THUMB1-NEXT: bge .LBB0_2
+; CHECK-THUMB1-NEXT: @ %bb.1: @ %bb1
+; CHECK-THUMB1-NEXT: movs r0, #1
+; CHECK-THUMB1-NEXT: bx lr
+; CHECK-THUMB1-NEXT: .LBB0_2: @ %bb2
+; CHECK-THUMB1-NEXT: movs r0, #2
+; CHECK-THUMB1-NEXT: bx lr
+;
+; CHECK-THUMB2-LABEL: test_slt1:
+; CHECK-THUMB2: @ %bb.0: @ %entry
+; CHECK-THUMB2-NEXT: subs r0, r0, r2
+; CHECK-THUMB2-NEXT: mov.w r12, #2
+; CHECK-THUMB2-NEXT: sbcs.w r0, r1, r3
+; CHECK-THUMB2-NEXT: it lt
+; CHECK-THUMB2-NEXT: movlt.w r12, #1
+; CHECK-THUMB2-NEXT: mov r0, r12
+; CHECK-THUMB2-NEXT: bx lr
entry:
- ; CHECK-ARM: subs {{[^,]+}}, r0, r2
- ; CHECK-ARM: mov [[TMP:[0-9a-z]+]], #2
- ; CHECK-ARM: sbcs {{[^,]+}}, r1, r3
- ; CHECK-ARM: movwlt [[TMP]], #1
- ; CHECK-ARM: mov r0, [[TMP]]
- ; CHECK-ARM: bx lr
- ; CHECK-THUMB2: subs {{[^,]+}}, r0, r2
- ; CHECK-THUMB2: mov.w [[TMP:[0-9a-z]+]], #2
- ; CHECK-THUMB2: sbcs.w {{[^,]+}}, r1, r3
- ; CHECK-THUMB2: it lt
- ; CHECK-THUMB2: movlt.w [[TMP]], #1
- ; CHECK-THUMB2: mov r0, [[TMP]]
- ; CHECK-THUMB2: bx lr
%cmp = icmp slt i64 %a, %b
br i1 %cmp, label %bb1, label %bb2
bb1:
@@ -28,22 +43,52 @@ bb2:
ret i32 2
}
-; CHECK-LABEL: test_slt2:
define void @test_slt2(i64 %a, i64 %b) {
+; CHECK-ARM-LABEL: test_slt2:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: push {r11, lr}
+; CHECK-ARM-NEXT: subs r0, r0, r2
+; CHECK-ARM-NEXT: sbcs r0, r1, r3
+; CHECK-ARM-NEXT: bge .LBB1_2
+; CHECK-ARM-NEXT: @ %bb.1: @ %bb1
+; CHECK-ARM-NEXT: bl f
+; CHECK-ARM-NEXT: pop {r11, pc}
+; CHECK-ARM-NEXT: .LBB1_2: @ %bb2
+; CHECK-ARM-NEXT: bl g
+; CHECK-ARM-NEXT: pop {r11, pc}
+;
+; CHECK-THUMB1-LABEL: test_slt2:
+; CHECK-THUMB1: @ %bb.0: @ %entry
+; CHECK-THUMB1-NEXT: push {r7, lr}
+; CHECK-THUMB1-NEXT: subs r0, r0, r2
+; CHECK-THUMB1-NEXT: sbcs r1, r3
+; CHECK-THUMB1-NEXT: bge .LBB1_2
+; CHECK-THUMB1-NEXT: @ %bb.1: @ %bb1
+; CHECK-THUMB1-NEXT: bl f
+; CHECK-THUMB1-NEXT: pop {r7, pc}
+; CHECK-THUMB1-NEXT: .LBB1_2: @ %bb2
+; CHECK-THUMB1-NEXT: bl g
+; CHECK-THUMB1-NEXT: pop {r7, pc}
+;
+; CHECK-THUMB2-LABEL: test_slt2:
+; CHECK-THUMB2: @ %bb.0: @ %entry
+; CHECK-THUMB2-NEXT: push {r7, lr}
+; CHECK-THUMB2-NEXT: subs r0, r0, r2
+; CHECK-THUMB2-NEXT: sbcs.w r0, r1, r3
+; CHECK-THUMB2-NEXT: bge .LBB1_2
+; CHECK-THUMB2-NEXT: @ %bb.1: @ %bb1
+; CHECK-THUMB2-NEXT: bl f
+; CHECK-THUMB2-NEXT: pop {r7, pc}
+; CHECK-THUMB2-NEXT: .LBB1_2: @ %bb2
+; CHECK-THUMB2-NEXT: bl g
+; CHECK-THUMB2-NEXT: pop {r7, pc}
entry:
%cmp = icmp slt i64 %a, %b
- ; CHECK-ARM: subs {{[^,]+}}, r0, r2
- ; CHECK-ARM: sbcs {{[^,]+}}, r1, r3
- ; CHECK-THUMB2: subs {{[^,]+}}, r0, r2
- ; CHECK-THUMB2: sbcs.w {{[^,]+}}, r1, r3
- ; CHECK: bge [[BB2:\.[0-9A-Za-z_]+]]
br i1 %cmp, label %bb1, label %bb2
bb1:
call void @f()
ret void
bb2:
- ; CHECK: [[BB2]]:
- ; CHECK-NEXT: bl g
call void @g()
ret void
}
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