[PATCH] D47462: [TableGen] Fix leaking synthesized registers.

[Florian Hahn via Phabricator via llvm-commits]

fhahn created this revision.
fhahn added reviewers: dsanders, kparzysz, stoklund.

By keeping track of unique_ptrs to the synthesized definitions in
CodeGenRegBank we avoid leaking them.


https://reviews.llvm.org/D47462

Files:
  utils/TableGen/CodeGenRegisters.cpp
  utils/TableGen/CodeGenRegisters.h


Index: utils/TableGen/CodeGenRegisters.h
===================================================================
--- utils/TableGen/CodeGenRegisters.h
+++ utils/TableGen/CodeGenRegisters.h
@@ -562,6 +562,9 @@
     // Give each register unit set an order based on sorting criteria.
     std::vector<unsigned> RegUnitSetOrder;
 
+    // Keep track of synthesized definitions generated in TupleExpander.
+    std::vector<std::unique_ptr<Record>> SynthDefs;
+
     // Add RC to *2RC maps.
     void addToMaps(CodeGenRegisterClass*);
 
Index: utils/TableGen/CodeGenRegisters.cpp
===================================================================
--- utils/TableGen/CodeGenRegisters.cpp
+++ utils/TableGen/CodeGenRegisters.cpp
@@ -605,6 +605,13 @@
 namespace {
 
 struct TupleExpander : SetTheory::Expander {
+  // Reference to SynthDefs in the containing CodeGenRegBank, to keep track of
+  // the synthesized definitions for their lifetime.
+  std::vector<std::unique_ptr<Record>> &SynthDefs;
+
+  TupleExpander(std::vector<std::unique_ptr<Record>> &SynthDefs)
+      : SynthDefs(SynthDefs) {}
+
   void expand(SetTheory &ST, Record *Def, SetTheory::RecSet &Elts) override {
     std::vector<Record*> Indices = Def->getValueAsListOfDefs("SubRegIndices");
     unsigned Dim = Indices.size();
@@ -649,7 +656,9 @@
       // Create a new Record representing the synthesized register. This record
       // is only for consumption by CodeGenRegister, it is not added to the
       // RecordKeeper.
-      Record *NewReg = new Record(Name, Def->getLoc(), Def->getRecords());
+      SynthDefs.emplace_back(
+          llvm::make_unique<Record>(Name, Def->getLoc(), Def->getRecords()));
+      Record *NewReg = SynthDefs.back().get();
       Elts.insert(NewReg);
 
       // Copy Proto super-classes.
@@ -1075,7 +1084,8 @@
   // Configure register Sets to understand register classes and tuples.
   Sets.addFieldExpander("RegisterClass", "MemberList");
   Sets.addFieldExpander("CalleeSavedRegs", "SaveList");
-  Sets.addExpander("RegisterTuples", llvm::make_unique<TupleExpander>());
+  Sets.addExpander("RegisterTuples",
+                   llvm::make_unique<TupleExpander>(SynthDefs));
 
   // Read in the user-defined (named) sub-register indices.
   // More indices will be synthesized later.


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