[PATCH] D47378: [AMDGPU][Waitcnt] Remove obsolete waitcnt option

[Mark Searles via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL333303: [AMDGPU][Waitcnt] Remove obsolete waitcnt option (authored by msearles, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D47378?vs=148629&id=148657#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D47378

Files:
  llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  llvm/trunk/test/CodeGen/AMDGPU/fence-barrier.ll


Index: llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -110,12 +110,6 @@
   cl::desc("Enable AMDGPU Alias Analysis"),
   cl::init(true));
 
-// Option to enable new waitcnt insertion pass.
-static cl::opt<bool> EnableSIInsertWaitcntsPass(
-  "enable-si-insert-waitcnts",
-  cl::desc("Use new waitcnt insertion pass"),
-  cl::init(true));
-
 // Option to run late CFG structurizer
 static cl::opt<bool, true> LateCFGStructurize(
   "amdgpu-late-structurize",
Index: llvm/trunk/test/CodeGen/AMDGPU/fence-barrier.ll
===================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/fence-barrier.ll
+++ llvm/trunk/test/CodeGen/AMDGPU/fence-barrier.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=amdgcn-amd-amdhsa-amdgiz -mcpu=gfx803 -enable-si-insert-waitcnts=1 -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
-; RUN: llvm-as -data-layout=A5 < %s | llc -mtriple=amdgcn-amd-amdhsa-amdgiz -mcpu=gfx803 -enable-si-insert-waitcnts=1 -verify-machineinstrs | FileCheck --check-prefix=GCN %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa-amdgiz -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
+; RUN: llvm-as -data-layout=A5 < %s | llc -mtriple=amdgcn-amd-amdhsa-amdgiz -mcpu=gfx803 -verify-machineinstrs | FileCheck --check-prefix=GCN %s
 
 declare i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr()
 declare i8 addrspace(4)* @llvm.amdgcn.implicitarg.ptr()


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