[PATCH] D47374: [RFC][patch 3/3] Add support for variant scheduling classes in llvm-mca.

[Andrea Di Biagio via Phabricator via llvm-commits]

andreadb added inline comments.


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Comment at: lib/Target/X86/X86ScheduleBtVer2.td:569
+def JWriteZeroLatency : SchedWriteRes<[]> {
+  let Latency = 0;
+}
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courbet wrote:
> I think you should also set NumMicroOps to 0 here.
Here, the number of opcodes is what gets subtracted to the IssueWidth budget for the current cycle.
On Jaguar, that quantity matches what the docs define as COP (complex opcode). Think of it as a container of uOps. An SSE xor is always decoded into a single COP. That COP is then sent to the RCU (and it takes one slot in the reorder buffer), and eliminated at register renaming stage.
Basically, although it is zero-latency, it still has to be retired. It consumes one slot in the ROB, and one slot in the dispatch group (subtracted to what llvm-mca calls "DispatchWidth" - the equivalent of the IssueWidth in the scheduling model).



https://reviews.llvm.org/D47374