[llvm] r333190 - [X86][BtVer2] Added Jaguar cpu cycle counter to permit llvm-exegesis latency testing

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Thu May 24 07:54:32 PDT 2018


Author: rksimon
Date: Thu May 24 07:54:32 2018
New Revision: 333190

URL: http://llvm.org/viewvc/llvm-project?rev=333190&view=rev
Log:
[X86][BtVer2] Added Jaguar cpu cycle counter to permit llvm-exegesis latency testing

Ideally we'd be able to test a CPU by using __builtin_readcyclecounter()/RDTSC instead (PR37193) if a model/cycle-counter is not specified.

NOTE: Jaguar PMCs don't give good coverage of resource pipes specified in the model (at the macro-vs-micro-op levels) but we should be able to cover at least a few resources.

Modified:
    llvm/trunk/lib/Target/X86/X86PfmCounters.td

Modified: llvm/trunk/lib/Target/X86/X86PfmCounters.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86PfmCounters.td?rev=333190&r1=333189&r2=333190&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86PfmCounters.td (original)
+++ llvm/trunk/lib/Target/X86/X86PfmCounters.td Thu May 24 07:54:32 2018
@@ -69,3 +69,7 @@ def SKXPort5Counter : PfmIssueCounter<SK
 def SKXPort6Counter : PfmIssueCounter<SKXPort6, ["uops_dispatched_port:port_6"]>;
 def SKXPort7Counter : PfmIssueCounter<SKXPort7, ["uops_dispatched_port:port_7"]>;
 }
+
+let SchedModel = BtVer2Model in {
+def JCycleCounter : PfmCycleCounter<"cpu_clk_unhalted">;
+}




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