[PATCH] D47194: [AMDGPU] Fixed non-uniform addr64 MUBUF in shader

[Tim Renouf via Phabricator via llvm-commits]

tpr added inline comments.


================
Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:3667
   if (isMIMG(MI) ||
       (AMDGPU::isShader(MF.getFunction().getCallingConv()) &&
+       (isMUBUF(MI) || isMTBUF(MI))
----------------
arsenm wrote:
> tpr wrote:
> > arsenm wrote:
> > > I don't like that this was checking the calling convention at all. Can we just eliminate that check altogether?
> > So (from a compute point of view) you think it is ok for all non-addr64 cases of MUBUF/MTBUF to go in here? I think that is probably ok, but then I'm not sure why Nicolai added the calling convention check in the first place.
> The main concerning case I'm aware of with anything touching these is for anything using the add-tid bit (and maybe strided access). In any case, the calling convention isn't actually the property that matters
So you want to replace the calling convention check with something else, but I don't think it is entirely clear yet what the check should be. Can we leave that to a subsequent change? My change here did not add it in the first place.


Repository:
  rL LLVM

https://reviews.llvm.org/D47194