[PATCH] D46133: [InstCombine, ARM, AArch64] Convert table lookup to shuffle vector

[Alexandros Lamprineas via Phabricator via llvm-commits]

labrinea updated this revision to Diff 148008.
labrinea added a comment.

- Restrict the optimization to table lookups returning a <8 x i8> vector type. It's only beneficial for the mask {7,6,5,4,3,2,1,0} anyway.
- Bail out if the constant mask contains an index out of range. The second argument of the new shufflevector is always going to be <undef> so the range is [0 ~ NumElts-1], not [0 ~ 2*NumElts-1], like @efriedma noticed.
- Replaced getZExtValue() with getLimitedValue() for getting the value of a ConstantInt.
- Simplified the retrieval of mask indices by using ConstantDataVector::get instead of ConstantVector::get.
- Added  testcases where the transform bails out.
- Autogenerated the Filecheck patterns using the script utils/update_test_checks.py


https://reviews.llvm.org/D46133

Files:
  lib/Transforms/InstCombine/InstCombineCalls.cpp
  test/Transforms/InstCombine/AArch64/tbl1.ll
  test/Transforms/InstCombine/ARM/tbl1.ll

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