[PATCH] D46528: [DAGCombine][X86][AArch64] Masked merge unfolding: vector edition.

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri marked 3 inline comments as done.
lebedev.ri added inline comments.


================
Comment at: lib/Target/AArch64/AArch64ISelLowering.h:455
+    if (!VT.isVector())
+      return hasAndNotCompare(Y);
+
----------------
spatel wrote:
> Could just return true here? We could assert that we're not dealing with FP if that's a concern.
I would think we should delegate to `hasAndNotCompare()`, since it is already there.


================
Comment at: test/CodeGen/X86/unfold-masked-merge-vector-variablemask-const.ll:65
+; CHECK-SSE2-NEXT:    pand (%rdi), %xmm0
+; CHECK-SSE2-NEXT:    por %xmm1, %xmm0
 ; CHECK-SSE2-NEXT:    retq
----------------
lebedev.ri wrote:
> RKSimon wrote:
> > This regression is rather unfortunate - anyway that we can get the X86ISD::ANDNP back?
> Uhh, great observation :/
> I think this case isn't even supposed to be affected,
> since we skip all `not` `xor`'s...
> I guess `isAllOnesConstantOrAllOnesSplatConstant()` is somehow misbehaving.
D47156


Repository:
  rL LLVM

https://reviews.llvm.org/D46528