[llvm] r332840 - ARM: be conservative when asked load/store alignment of weird type.

[Tim Northover via llvm-commits]

Author: tnorthover
Date: Mon May 21 05:43:54 2018
New Revision: 332840

URL: http://llvm.org/viewvc/llvm-project?rev=332840&view=rev
Log:
ARM: be conservative when asked load/store alignment of weird type.

Chances are we'll be asked again after type legalization, but before that point
it's better to claim misaligned accesses aren't allowed than to assert.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
    llvm/trunk/test/CodeGen/ARM/unaligned_load_store_vector.ll

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=332840&r1=332839&r2=332840&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon May 21 05:43:54 2018
@@ -12825,6 +12825,10 @@ bool ARMTargetLowering::allowsMisaligned
                                                        unsigned,
                                                        unsigned,
                                                        bool *Fast) const {
+  // Depends what it gets converted into if the type is weird.
+  if (!VT.isSimple())
+    return false;
+
   // The AllowsUnaliged flag models the SCTLR.A setting in ARM cpus
   bool AllowsUnaligned = Subtarget->allowsUnalignedMem();
 

Modified: llvm/trunk/test/CodeGen/ARM/unaligned_load_store_vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/unaligned_load_store_vector.ll?rev=332840&r1=332839&r2=332840&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/unaligned_load_store_vector.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/unaligned_load_store_vector.ll Mon May 21 05:43:54 2018
@@ -485,3 +485,11 @@ entry:
   ret void
 }
 
+define void @test_weird_type(<3 x double> %in, <3 x i64>* %ptr) {
+; CHECK-LABEL: test_weird_type:
+; CHECK: vst1
+
+  %vec.int = bitcast <3 x double> %in to <3 x i64>
+  store <3 x i64> %vec.int, <3 x i64>* %ptr, align 8
+  ret void
+}