[PATCH] D46268: [mips] Add support for Global INValidate ASE

[Simon Dardis via Phabricator via llvm-commits]

sdardis added inline comments.


================
Comment at: lib/Target/Mips/MicroMips32r6InstrFormats.td:899
+
+  let Inst{31-21} = 0x0;
+  let Inst{20-16} = rs;
----------------
Split this range up into the fields as specified by the arch reference manual.


================
Comment at: lib/Target/Mips/MicroMips32r6InstrFormats.td:901
+  let Inst{20-16} = rs;
+  let Inst{15-11} = ginv;
+  let Inst{10-9}  = type;
----------------
Likewise.


================
Comment at: lib/Target/Mips/Mips32r6InstrFormats.td:601
+  let Inst{25-21} = rs;
+  let Inst{9-8}   = type_;
+  let Inst{7-6}   = ginv;
----------------
This is missing bits 20-10.


================
Comment at: lib/Target/Mips/Mips32r6InstrInfo.td:834
+class GINV_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
+                    InstrItinClass itin> : MipsR6Arch<instr_asm> {
+  dag OutOperandList = (outs);
----------------
Indent this line so that InstrItinClass is directly underneath the 'string' in the line above.


================
Comment at: lib/Target/Mips/Mips32r6InstrInfo.td:840
+  InstrItinClass Itinerary = itin;
+}
+
----------------
Also requires 'bit hasSideEffects = 1;'


Repository:
  rL LLVM

https://reviews.llvm.org/D46268