[PATCH] D46762: [AArch64] Improve single vector lane unscaled stores

Evandro Menezes via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 15 13:45:08 PDT 2018


This revision was automatically updated to reflect the committed changes.
Closed by commit rL332394: [AArch64] Improve single vector lane unscaled stores (authored by evandro, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D46762?vs=146362&id=146911#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D46762

Files:
  llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/trunk/test/CodeGen/AArch64/arm64-st1.ll
  llvm/trunk/test/CodeGen/AArch64/fp16-vector-load-store.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D46762.146911.patch
Type: text/x-patch
Size: 11821 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180515/ec898174/attachment.bin>


More information about the llvm-commits mailing list