[PATCH] D46118: [RISCV] AsmParser support for the li pseudo instruction

Mario Werner via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri May 11 08:44:50 PDT 2018


niosHD updated this revision to Diff 146330.
niosHD retitled this revision from "[RISCV] [WIP] AsmParser support for the li pseudo instruction" to "[RISCV] AsmParser support for the li pseudo instruction".
niosHD added a comment.

I finally found the time to work on this patch, sorry for the  delay.

This revision contains two notable updates. First, compression tests have been added. Second, I replaced the ADDIW, which was emitted for the first ADDI (similar to gas) in 64-bit mode, through a regular ADDI. Doing so provides more compression opportunities and also makes the code in 64-bit mode more similar to the one in 32-bit mode (i.e., enables shared tests in `rvi-aliases-valid.s` and `rvc-aliases-valid.s`).

With these updates, this patch is now ready for review.

PS Even though I am confident that replacing the first ADDIW with ADDI is correct, a second opinion is still appreciated. ;)


https://reviews.llvm.org/D46118

Files:
  lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  lib/Target/RISCV/RISCVInstrFormats.td
  lib/Target/RISCV/RISCVInstrInfo.td
  test/MC/RISCV/rv32c-aliases-valid.s
  test/MC/RISCV/rv32i-aliases-invalid.s
  test/MC/RISCV/rv32i-aliases-valid.s
  test/MC/RISCV/rv64c-aliases-valid.s
  test/MC/RISCV/rv64i-aliases-invalid.s
  test/MC/RISCV/rv64i-aliases-valid.s
  test/MC/RISCV/rvc-aliases-valid.s
  test/MC/RISCV/rvi-aliases-valid.s

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