[PATCH] D46749: Reduce masked data movement chains and memory access widths

[Diogo N. Sampaio via Phabricator via llvm-commits]

dnsampaio created this revision.
dnsampaio added reviewers: SjoerdMeijer, samparker, efriedma.
Herald added a reviewer: javed.absar.
Herald added a subscriber: llvm-commits.

Operations alike:
M[x] = M[x] & 0xFF00 | (M[x] >> 8) & 0x00FF

can be simplified in 2 ways.
1st:  Reusing M[x] & 0xFF00 to compute (M[x] >> 8) & 0x00FF such as:
tmp1 = M[x] & 0xFF00;
M[x] = tmp1 | (tmp1 >> 8)

2nd: We can detect that tmp1 does not overlap with (tmp1 >> 8), and say that
M[x].lowerHalf = M[x].higherHalf

Reducing load and store width operations.


Repository:
  rL LLVM

https://reviews.llvm.org/D46749

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/ARM/stld-width-reduction1.ll
  test/CodeGen/ARM/stld-width-reduction2.ll
  test/CodeGen/ARM/stld-width-reduction3.ll
  test/CodeGen/ARM/stld-width-reduction4.ll
  test/CodeGen/X86/fp128-i128.ll
  test/CodeGen/X86/pr32329.ll
  test/CodeGen/X86/pr32588.ll

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