[PATCH] D46008: [X86][AArch64][NFC] Add tests for vector masked merge unfolding

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added a comment.

In https://reviews.llvm.org/D46008#1094412, @RKSimon wrote:

>




> we'd be better off adding 256-bit vector widths.

I initially had 256 and 512 bit vectors here too, but they did not seem to add any additional coverage,
but added a lot of lines, so i have dropped them. But if you say they are needed, i can totally re-add them, ?

> For X86 I think you should remove the 8/16/32/64 vector width tests, I don't see them adding much (type legalization....)

That is basically the same, or opposite question to adding wider vector tests. 
The vector widths will be increasing, and it's unlikely we'll test every singe one of them.
But the lower vector widths will stay (8/16/32/64),
so i'm not yet seeing the logic as to why we'd want to test wider vectors, but not shallower vectors.


Repository:
  rL LLVM

https://reviews.llvm.org/D46008