[PATCH] D46591: [AArch64] Fix performPostLD1Combine to check for constant lane index.

[Geoff Berry via Phabricator via llvm-commits]

gberry added inline comments.


================
Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:9938
+    Lane = N->getOperand(2);
+    if (!isa<ConstantSDNode>(Lane))
+      return SDValue();
----------------
javed.absar wrote:
> samparker wrote:
> > Should the value of Lane also be checked for legality?
> Maybe simpler to write it as :
> 
> // Check lane is a ...
> if (IsLaneOp && !isa<ConstantSDNode>(N->getOperand(2)) 
>    return ..
> 
I added a range check of the lane index, even though I don't think it is possible to get an INSERT_VECTOR_ELT with an out-of-range constant index at this point in isel.  Better safe than sorry though.

@javed.absar  I don't think your suggestion makes sense after the addition of the range check.  I also like that the later use of 'Lane' is a little clearer, but I don't feel strongly about it.


Repository:
  rL LLVM

https://reviews.llvm.org/D46591