[PATCH] D46356: [TableGen] Emit a fatal error on inconsistencies in resource units vs cycles.

[Clement Courbet via Phabricator via llvm-commits]

courbet updated this revision to Diff 144865.
courbet added a comment.

- Allow fully implicit ResourceCycles in ZnXXXPair model. as per Andrea's comment.
- Update TargetSchedule.td documentation.


Repository:
  rL LLVM

https://reviews.llvm.org/D46356

Files:
  include/llvm/Target/TargetSchedule.td
  lib/Target/AArch64/AArch64SchedExynosM1.td
  lib/Target/AArch64/AArch64SchedExynosM3.td
  lib/Target/AArch64/AArch64SchedThunderX2T99.td
  lib/Target/ARM/ARMScheduleA9.td
  lib/Target/Mips/MipsScheduleGeneric.td
  lib/Target/X86/X86SchedBroadwell.td
  lib/Target/X86/X86ScheduleBtVer2.td
  lib/Target/X86/X86ScheduleSLM.td
  lib/Target/X86/X86ScheduleZnver1.td
  utils/TableGen/SubtargetEmitter.cpp

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