[PATCH] D46350: [RISCV] Add WasForced parameter to MCAsmBackend::fixupNeedsRelaxationAdvanced

[Shiva Chen via Phabricator via llvm-commits]

shiva0217 created this revision.
shiva0217 added reviewers: asb, apazos, sabuasal.
Herald added subscribers: mgrang, edward-jones, zzheng, kito-cheng, niosHD, jordy.potman.lists, simoncook, johnrusso, rbar.

For RISCV branch instructions, we need to preserve relocation types when linker relaxation enabled, so then linker could modify offset when the branch offsets changed.

We preserve relocation types by define shouldForceRelocation. IsResolved return by evaluateFixup will always false when shouldForceRelocation return true. It will make RISCV MC Branch Relaxation always relax 16-bit branches to 32-bit form, even if the symbol actually could be resolved.

To avoid 16-bit branches always relax to 32-bit form when linker relaxation enabled, we add a new parameter WasForced to indicate that the symbol actually couldn't be resolved and not forced by shouldForceRelocation return true.

RISCVAsmBackend::fixupNeedsRelaxationAdvanced could relax branches with unresolved symbols by (!IsResolved && !WasForced).

RISCV MC Branch Relaxation is needed because RISCV could perform 32-bit to 16-bit transformation in MC layer.

The patch is based on the discussion in https://reviews.llvm.org/D44887.


Repository:
  rL LLVM

https://reviews.llvm.org/D46350

Files:
  include/llvm/MC/MCAsmBackend.h
  include/llvm/MC/MCAssembler.h
  lib/MC/MCAsmBackend.cpp
  lib/MC/MCAssembler.cpp
  lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
  lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
  test/MC/RISCV/compressed-relocations.s
  test/MC/RISCV/rv32-relaxation.s
  test/MC/RISCV/rv64-relaxation.s

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