[PATCH] D46298: AMDGPU: Remove deadcode in isSDNodeSourceOfDivergence()

[Tom Stellard via Phabricator via llvm-commits]

tstellar created this revision.
tstellar added reviewers: alex-t, arsenm, nhaehnle.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, wdng, kzhuravl.

The code that handles ISD:Register and ISD::CopyFromReg assumes
the target is amdgcn, so there is no reason to check r600 registers.

Also, add an early exit when the triple is r600 to avoid a possible
crash.


Repository:
  rL LLVM

https://reviews.llvm.org/D46298

Files:
  lib/Target/AMDGPU/AMDGPUISelLowering.cpp


Index: lib/Target/AMDGPU/AMDGPUISelLowering.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -797,6 +797,8 @@
       }
       if (R)
       {
+        if (getTargetMachine().getTargetTriple().getArch() == Triple::r600)
+          return false;
         const MachineFunction * MF = FLI->MF;
         const SISubtarget &ST = MF->getSubtarget<SISubtarget>();
         const MachineRegisterInfo &MRI = MF->getRegInfo();
@@ -808,10 +810,7 @@
         if (MRI.isLiveIn(Reg)) {
           // workitem.id.x workitem.id.y workitem.id.z
           // Any VGPR formal argument is also considered divergent
-          if ((MRI.getLiveInPhysReg(Reg) == AMDGPU::T0_X) ||
-              (MRI.getLiveInPhysReg(Reg) == AMDGPU::T0_Y) ||
-              (MRI.getLiveInPhysReg(Reg) == AMDGPU::T0_Z) ||
-              (TRI.isVGPR(MRI, Reg)))
+          if (TRI.isVGPR(MRI, Reg))
               return true;
           // Formal arguments of non-entry functions
           // are conservatively considered divergent


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