[PATCH] D45022: [X86] Mark all byval parameters as aliased

[Jeremy Morse via Phabricator via llvm-commits]

jmorse updated this revision to Diff 144567.
jmorse added a comment.

Updated with comment + cosmetics to the CreateFixedObject call, changed test to be an llc codegen test.


https://reviews.llvm.org/D45022

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/pr30290.ll


Index: test/CodeGen/X86/pr30290.ll
===================================================================
--- /dev/null
+++ test/CodeGen/X86/pr30290.ll
@@ -0,0 +1,32 @@
+; RUN: llc -mcpu=btver2 %s -stop-after post-RA-sched -o - | FileCheck %s
+; Test desc: two functions (foo, bar) with byval arguments, should not have
+; reads/writes from/to byval storage re-ordered.
+source_filename = "test.c"
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-pc-linux-gnu"
+
+%struct.face = type { [7 x i32] }
+
+; Function Attrs: noinline nounwind uwtable
+declare void @baz(%struct.face* byval nocapture readonly align 8);
+
+; Function Attrs: noinline nounwind uwtable
+define void @foo(%struct.face* byval nocapture align 8) local_unnamed_addr {
+  %2 = bitcast %struct.face* %0 to <4 x i32>*
+  store <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32>* %2, align 8
+  %3 = getelementptr inbounds %struct.face, %struct.face* %0, i64 0, i32 0, i64 4
+  store i32 1, i32* %3, align 8
+; XXX XXX XXX
+; Fault happens here: five "1" constants have just been written into the byval
+; %struct.face, but the subsequent byval read of that struct (next call)
+; gets re-ordered with those writes, illegally.
+
+; Ensure that we get two uninterrupted stores to the stack slot, one from const
+; pool, the other of an immediate.
+; CHECK: VMOVDQAmr $rsp, 1, $noreg, {{[0-9]+}}, $noreg, killed renamable $xmm{{[0-9]+}} :: (store 16 into %ir.2)
+; CHECK-NEXT: MOV32mi $rsp, 1, $noreg, {{[0-9]+}}, $noreg, 1 :: (store 4 into %ir.3, align 16)
+
+
+  call void @baz(%struct.face* byval nonnull align 8 %0)
+  ret void
+}
Index: lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- lib/Target/X86/X86ISelLowering.cpp
+++ lib/Target/X86/X86ISelLowering.cpp
@@ -2839,7 +2839,11 @@
   if (Flags.isByVal()) {
     unsigned Bytes = Flags.getByValSize();
     if (Bytes == 0) Bytes = 1; // Don't create zero-sized stack objects.
-    int FI = MFI.CreateFixedObject(Bytes, VA.getLocMemOffset(), isImmutable);
+
+    // FIXME: For now, all byval parameter objects are marked as aliasing. This
+    // can be improved with deeper analysis.
+    int FI = MFI.CreateFixedObject(Bytes, VA.getLocMemOffset(), isImmutable,
+                                   /*isAliased=*/true);
     // Adjust SP offset of interrupt parameter.
     if (CallConv == CallingConv::X86_INTR) {
       MFI.setObjectOffset(FI, Offset);


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