[PATCH] D46221: [RISCV] Lower tail pseudo instruction

Alex Bradbury via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 30 05:24:09 PDT 2018


asb requested changes to this revision.
asb added a comment.
This revision now requires changes to proceed.

This patch would be better named 'Implement MC layer support for the tail pseudoinstruction' or similar. It should apply to the current head ,with https://reviews.llvm.org/D45395 rebased to apply on top of it. This is because MC layer support is a useful incremental change, and can be cleanly separated from the codegen changes (meaning we can revert one without affecting the other).

It looks like you'd just need to add the PseudoTAIL definition to RISCVInstrInfo.td and remove the PseudoTAILIndirect reference from this patch (it can be introduced in https://reviews.llvm.org/D45935).



================
Comment at: lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp:154
     expandFunctionCall(MI, OS, Fixups, STI);
-    MCNumEmitted += 2;
+    MCNumEmitted += (MI.getOpcode() == RISCV::PseudoTAILIndirect) ? 1 : 2;
     return;
----------------
This line is probably going to be deleted in this patch anyway, but at least for the follow-up patch that includes PseudoTAILIndirect it might be better to have expandFunctionCall return the number of MIs inserted.


Repository:
  rL LLVM

https://reviews.llvm.org/D46221





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