[llvm] r331158 - [X86] Remove some instructions from the Intel assembly matcher table as there are equivalent mode aware InstAliases that conflict.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Sun Apr 29 23:21:21 2018
New Revision: 331158

URL: http://llvm.org/viewvc/llvm-project?rev=331158&view=rev
Log:
[X86] Remove some instructions from the Intel assembly matcher table as there are equivalent mode aware InstAliases that conflict.

The instructions have predicates of Not64BitMode, but there are identical strings in InstAliases that have Mode32Bit and Mode16Bit. But the ordering is uncontrolled and the less specific Not64BitMode was ordered first.

This patch hides the Not64BitMode from the table so there is no conflict anymore.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrControl.td

Modified: llvm/trunk/lib/Target/X86/X86InstrControl.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrControl.td?rev=331158&r1=331157&r2=331158&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrControl.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrControl.td Sun Apr 29 23:21:21 2018
@@ -167,7 +167,7 @@ let isBranch = 1, isTerminator = 1, isBa
                       Requires<[In64BitMode]>, Sched<[WriteJumpLd]>, NOTRACK;
   }
 
-  let Predicates = [Not64BitMode] in {
+  let Predicates = [Not64BitMode], AsmVariantName = "att" in {
     def FARJMP16i  : Iseg16<0xEA, RawFrmImm16, (outs),
                             (ins i16imm:$off, i16imm:$seg),
                             "ljmp{w}\t$seg, $off", []>,
@@ -244,7 +244,7 @@ let isCall = 1 in
                         Sched<[WriteJumpLd]>, NOTRACK;
     }
 
-    let Predicates = [Not64BitMode] in {
+    let Predicates = [Not64BitMode], AsmVariantName = "att" in {
       def FARCALL16i  : Iseg16<0x9A, RawFrmImm16, (outs),
                                (ins i16imm:$off, i16imm:$seg),
                                "lcall{w}\t$seg, $off", []>,