[PATCH] D46215: [AArch64] Support reserving x16 and x17 register

Kristof Beyls via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Apr 28 00:16:33 PDT 2018


kristof.beyls added a reviewer: srhines.
kristof.beyls added a comment.

I have some doubts this is the right long term approach.

As https://android.googlesource.com/kernel/common/+/c0385b24af15020a1e505f2c984db0d7c0d017e1%5E%21/#F4 indicates, there are others who have use cases for reserving other registers than x16,x17,x18. (The linked patch reserves x1,x2,x3,x4,x5,x6,x7).
With that indication, I think it may be better to bite the bullet now and implement full support for gcc command line option "-ffixed-//reg//", where //reg// is, according to the gcc documentation: "reg must be the name of a register. The register names accepted are machine-specific and are defined in the REGISTER_NAMES macro in the machine description macro file.".
For the full documentation of this option, see https://gcc.gnu.org/onlinedocs/gcc/Code-Gen-Options.html.

What do you think?

Thanks,

Kristof


Repository:
  rL LLVM

https://reviews.llvm.org/D46215





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