[PATCH] D45995: [DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
Vedant Kumar via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 27 18:13:14 PDT 2018
vsk updated this revision to Diff 144426.
vsk marked 4 inline comments as done.
vsk edited the summary of this revision.
vsk added a reviewer: fedor.sergeev.
vsk added a comment.
Herald added a subscriber: jyknight.
- Update a SPARC test missed during earlier testing.
https://reviews.llvm.org/D45995
Files:
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
test/CodeGen/AArch64/arm64-aapcs.ll
test/CodeGen/AArch64/arm64-ldp-cluster.ll
test/CodeGen/ARM/vector-load.ll
test/CodeGen/SPARC/32abi.ll
test/CodeGen/SPARC/64abi.ll
test/CodeGen/X86/avg.ll
test/CodeGen/X86/dagcombine-cse.ll
test/CodeGen/X86/fold-zext-trunc.ll
test/CodeGen/X86/known-bits-vector.ll
test/CodeGen/X86/legalize-shift-64.ll
test/CodeGen/X86/load-combine.ll
test/CodeGen/X86/mulx32.ll
test/CodeGen/X86/promote-vec3.ll
test/CodeGen/X86/widen_conv-3.ll
test/CodeGen/X86/widen_conv-4.ll
test/CodeGen/X86/win-smallparams.ll
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