[PATCH] D46158: [DAGCombiner] Set the right SDLoc on a newly-created sextload (4/N)

[Vedant Kumar via Phabricator via llvm-commits]

vsk created this revision.
vsk added reviewers: aprantl, niravd.
Herald added a reviewer: javed.absar.

This teaches tryToFoldSZExtLoad to set the right location on a
newly-created extload. With that in place, the logic for performing a
certain ([s|z]ext (load ...)) combine becomes identical for sexts and
zexts, and we can get rid of one copy of the logic.

The test case churn is due to dependencies on IROrders inherited from
the wrong SDLoc.

Part of: llvm.org/PR37262


https://reviews.llvm.org/D46158

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/AArch64/arm64-ldp-cluster.ll
  test/CodeGen/X86/avx512-insert-extract.ll
  test/CodeGen/X86/fold-sext-trunc.ll
  test/CodeGen/X86/known-signbits-vector.ll
  test/CodeGen/X86/pr32284.ll
  test/CodeGen/X86/vector-shuffle-variable-128.ll
  test/CodeGen/X86/vector-shuffle-variable-256.ll
  test/CodeGen/X86/widen_arith-4.ll
  test/CodeGen/X86/widen_arith-5.ll

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