[PATCH] D45788: Mitigate relocation overflow [part 1 of 2]

[Han Shen via Phabricator via llvm-commits]

shenhan updated this revision to Diff 144224.
shenhan retitled this revision from "Mitigate relocation overflow" to "Mitigate relocation overflow [part 1 of 2]".
shenhan edited the summary of this revision.

Repository:
  rLLD LLVM Linker

https://reviews.llvm.org/D45788

Files:
  ELF/Writer.cpp
  test/ELF/aarch64-copy.s
  test/ELF/arm-copy.s
  test/ELF/pre_init_fini_array_missing.s


Index: test/ELF/pre_init_fini_array_missing.s
===================================================================
--- test/ELF/pre_init_fini_array_missing.s
+++ test/ELF/pre_init_fini_array_missing.s
@@ -14,30 +14,27 @@
   call __fini_array_start
   call __fini_array_end
 
-// With no .init_array section the symbols resolve to 0
-// 0 - (0x201000 + 5) = -2101253
-// 0 - (0x201005 + 5) = -2101258
-// 0 - (0x20100a + 5) = -2101263
-// 0 - (0x20100f + 5) = -2101268
-// 0 - (0x201014 + 5) = -2101273
-// 0 - (0x201019 + 5) = -2101278
+// With no .init_array section the symbols resolve to ".text".
 
 // CHECK: Disassembly of section .text:
 // CHECK-NEXT:  _start:
-// CHECK-NEXT:   201000:    e8 fb ef df ff     callq    -2101253
-// CHECK-NEXT:   201005:    e8 f6 ef df ff     callq    -2101258
-// CHECK-NEXT:   20100a:    e8 f1 ef df ff     callq    -2101263
-// CHECK-NEXT:   20100f:    e8 ec ef df ff     callq    -2101268
-// CHECK-NEXT:   201014:    e8 e7 ef df ff     callq    -2101273
-// CHECK-NEXT:   201019:    e8 e2 ef df ff     callq    -2101278
+// CHECK-NEXT:   201000:    e8 fb ff ff ff     callq    -5
+// CHECK-NEXT:   201005:    e8 f6 ff ff ff     callq    -10
+// CHECK-NEXT:   20100a:    e8 f1 ff ff ff     callq    -15
+// CHECK-NEXT:   20100f:    e8 ec ff ff ff     callq    -20
+// CHECK-NEXT:   201014:    e8 e7 ff ff ff     callq    -25
+// CHECK-NEXT:   201019:    e8 e2 ff ff ff     callq    -30
 
-// In position-independent binaries, they resolve to the image base.
+// In position-independent binaries, they resolve to ".text".  (As
+// long as there is no .init_array section, the address of
+// __init_array_start / end pair (and alike) does not matter, provided
+// that each such pair has same address value.)
 
 // PIE:      Disassembly of section .text:
 // PIE-NEXT: _start:
-// PIE-NEXT:     1000:	e8 fb ef ff ff 	callq	-4101
-// PIE-NEXT:     1005:	e8 f6 ef ff ff 	callq	-4106
-// PIE-NEXT:     100a:	e8 f1 ef ff ff 	callq	-4111
-// PIE-NEXT:     100f:	e8 ec ef ff ff 	callq	-4116
-// PIE-NEXT:     1014:	e8 e7 ef ff ff 	callq	-4121
-// PIE-NEXT:     1019:	e8 e2 ef ff ff 	callq	-4126
+// PIE-NEXT:     1000:	e8 fb ff ff ff 	callq	-5
+// PIE-NEXT:     1005:	e8 f6 ff ff ff 	callq	-10
+// PIE-NEXT:     100a:	e8 f1 ff ff ff 	callq	-15
+// PIE-NEXT:     100f:	e8 ec ff ff ff 	callq	-20
+// PIE-NEXT:     1014:	e8 e7 ff ff ff 	callq	-25
+// PIE-NEXT:     1019:	e8 e2 ff ff ff 	callq	-30
Index: test/ELF/arm-copy.s
===================================================================
--- test/ELF/arm-copy.s
+++ test/ELF/arm-copy.s
@@ -78,4 +78,4 @@
 
 // RODATA: Contents of section .rodata:
 // S(z) = 0x13004
-// RODATA-NEXT: 10114 04300100
+// RODATA-NEXT: 10144 04300100
Index: test/ELF/aarch64-copy.s
===================================================================
--- test/ELF/aarch64-copy.s
+++ test/ELF/aarch64-copy.s
@@ -90,4 +90,4 @@
 
 // RODATA: Contents of section .rodata:
 // S(z) = 0x40014
-// RODATA-NEXT:  101c8 14000400
+// RODATA-NEXT:  10228 14000400
Index: ELF/Writer.cpp
===================================================================
--- ELF/Writer.cpp
+++ ELF/Writer.cpp
@@ -717,6 +717,16 @@
   if (!(Sec->Flags & SHF_ALLOC))
     return Rank | RF_NOT_ALLOC;
 
+  // Place .dynsym and .dynstr at the beginning of "ALLOC"
+  // sections. We want to do this to mitigate the possibility that
+  // huge .dynsym and .dynstr sections placed between text sections
+  // cause relocation overflow.  Note: .dynstr has SHT_STRTAB type and
+  // ALLOC attribute, whereas sections that only have SHT_STRTAB but
+  // without ALLOC is placed at the end. All "Sec" reaching here has
+  // "ALLOC" bit set.
+  if (Sec->Type == SHT_DYNSYM || Sec->Type == SHT_STRTAB)
+    return Rank;
+
   // Sort sections based on their access permission in the following
   // order: R, RX, RWX, RW.  This order is based on the following
   // considerations:


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