[llvm] r330981 - DAG: Fix not legalizing vector fcanonicalizes

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Thu Apr 26 12:21:37 2018
New Revision: 330981

URL: http://llvm.org/viewvc/llvm-project?rev=330981&view=rev
Log:
DAG: Fix not legalizing vector fcanonicalizes

If an fcanoncialize was done on a vector type that was legal,

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
    llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
    llvm/trunk/test/CodeGen/AMDGPU/fcanonicalize.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp?rev=330981&r1=330980&r2=330981&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp Thu Apr 26 12:21:37 2018
@@ -366,6 +366,7 @@ SDValue VectorLegalizer::LegalizeOp(SDVa
   case ISD::UMAX:
   case ISD::SMUL_LOHI:
   case ISD::UMUL_LOHI:
+  case ISD::FCANONICALIZE:
     QueryType = Node->getValueType(0);
     break;
   case ISD::FP_ROUND_INREG:

Modified: llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp?rev=330981&r1=330980&r2=330981&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp Thu Apr 26 12:21:37 2018
@@ -479,6 +479,7 @@ SITargetLowering::SITargetLowering(const
     setOperationAction(ISD::FMA, MVT::v2f16, Legal);
     setOperationAction(ISD::FMINNUM, MVT::v2f16, Legal);
     setOperationAction(ISD::FMAXNUM, MVT::v2f16, Legal);
+    setOperationAction(ISD::FCANONICALIZE, MVT::v2f16, Legal);
 
     // This isn't really legal, but this avoids the legalizer unrolling it (and
     // allows matching fneg (fabs x) patterns)

Modified: llvm/trunk/test/CodeGen/AMDGPU/fcanonicalize.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/fcanonicalize.ll?rev=330981&r1=330980&r2=330981&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/fcanonicalize.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/fcanonicalize.ll Thu Apr 26 12:21:37 2018
@@ -7,6 +7,7 @@ declare double @llvm.canonicalize.f64(do
 declare half @llvm.canonicalize.f16(half) #0
 declare <2 x half> @llvm.canonicalize.v2f16(<2 x half>) #0
 declare i32 @llvm.amdgcn.workitem.id.x() #0
+declare <2 x double> @llvm.canonicalize.v2f64(<2 x double>) #0
 
 ; GCN-LABEL: {{^}}v_test_canonicalize_var_f32:
 ; GCN: v_mul_f32_e32 [[REG:v[0-9]+]], 1.0, {{v[0-9]+}}
@@ -528,6 +529,18 @@ define amdgpu_kernel void @test_canonica
   ret void
 }
 
+; GCN-LABEL: {{^}}v_test_canonicalize_var_v2f64:
+; GCN: v_max_f64
+; GCN: v_max_f64
+define amdgpu_kernel void @v_test_canonicalize_var_v2f64(<2 x double> addrspace(1)* %out) #1 {
+  %tid = call i32 @llvm.amdgcn.workitem.id.x()
+  %gep = getelementptr <2 x double>, <2 x double> addrspace(1)* %out, i32 %tid
+  %val = load <2 x double>, <2 x double> addrspace(1)* %gep
+  %canonicalized = call <2 x double> @llvm.canonicalize.v2f64(<2 x double> %val)
+  store <2 x double> %canonicalized, <2 x double> addrspace(1)* %out
+  ret void
+}
+
 attributes #0 = { nounwind readnone }
 attributes #1 = { nounwind }
 attributes #2 = { nounwind "target-features"="-fp32-denormals,-fp64-fp16-denormals" }