[PATCH] D46116: [NVPTX] Make the legalizer expand shufflevector of <2 x half>

Benjamin Kramer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 26 05:41:58 PDT 2018


bkramer created this revision.
bkramer added a reviewer: tra.
Herald added a subscriber: jholewinski.

There's no direct instruction for this, but it's trivially implemented
with two movs. Without this the code generator just dies when
encountering a shufflevector.


Repository:
  rL LLVM

https://reviews.llvm.org/D46116

Files:
  lib/Target/NVPTX/NVPTXISelLowering.cpp
  test/CodeGen/NVPTX/f16x2-instructions.ll


Index: test/CodeGen/NVPTX/f16x2-instructions.ll
===================================================================
--- test/CodeGen/NVPTX/f16x2-instructions.ll
+++ test/CodeGen/NVPTX/f16x2-instructions.ll
@@ -1423,5 +1423,13 @@
   ret <2 x half> %r
 }
 
+; CHECK-LABEL: test_shufflevector(
+; CHECK: mov.b32 {%h1, %h2}, %hh1;
+; CHECK: mov.b32 %hh2, {%h2, %h1};
+define <2 x half> @test_shufflevector(<2 x half> %a) #0 {
+  %s = shufflevector <2 x half> %a, <2 x half> undef, <2 x i32> <i32 1, i32 0>
+  ret <2 x half> %s
+}
+
 attributes #0 = { nounwind }
 attributes #1 = { "unsafe-fp-math" = "true" }
Index: lib/Target/NVPTX/NVPTXISelLowering.cpp
===================================================================
--- lib/Target/NVPTX/NVPTXISelLowering.cpp
+++ lib/Target/NVPTX/NVPTXISelLowering.cpp
@@ -375,6 +375,7 @@
   setOperationAction(ISD::FP_TO_SINT, MVT::f16, Legal);
   setOperationAction(ISD::BUILD_VECTOR, MVT::v2f16, Custom);
   setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f16, Custom);
+  setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f16, Expand);
 
   setFP16OperationAction(ISD::SETCC, MVT::f16, Legal, Promote);
   setFP16OperationAction(ISD::SETCC, MVT::v2f16, Legal, Expand);


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