[PATCH] D46023: [AArch64][SVE] Asm: Support for gather LD1/LDFF1 (scalar + vector) load instructions.

[Florian Hahn via Phabricator via llvm-commits]

fhahn added a comment.

Thanks for combining the 64 bit classes! LGTM



================
Comment at: lib/Target/AArch64/SVEInstrFormats.td:767
+//===----------------------------------------------------------------------===//
+
+class sve_mem_32b_gld_sv<bits<4> opc, bit xs, bit scaled, string asm,
----------------
please add a similar comment here as for sve_mem_64b_gld_sv


https://reviews.llvm.org/D46023