[PATCH] D45951: [AArch64][SVE] Asm: Add AsmOperand classes for SVE gather/scatter addressing modes.

Florian Hahn via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 23 08:40:36 PDT 2018


fhahn accepted this revision.
fhahn added a comment.
This revision is now accepted and ready to land.

LGTM, extension related to SVE register parsing.



================
Comment at: lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:861
   template <int ElementWidth, unsigned Class>
-  bool isSVEVectorRegOfWidth() const {
+  DiagnosticPredicate isSVEVectorRegOfWidth() const {
     return isSVEVectorReg<Class>() &&
----------------
I think this won't compile unless D45879 is committed. I do not think we should block this patch series on D45879.


https://reviews.llvm.org/D45951





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