[PATCH] D45522: [PowerPC] fix incorrect vectorization of abs() on POWER9

[Hiroshi Inoue via Phabricator via llvm-commits]

inouehrs added inline comments.


================
Comment at: lib/Target/PowerPC/PPCISelDAGToDAG.cpp:4810
+
+    if (VecVT == MVT::v4i32) {
+      AbsOpcode = PPC::VABSDUW;
----------------
nemanjai wrote:
> inouehrs wrote:
> > nemanjai wrote:
> > > It seems that for the `v4i32` type, we should be able to just use `xvnegsp` rather than loading the immediate, moving and adding.
> > Do you know it is safe to use a floating point instruction for integer data if the bit pattern is for NaN of Inf?
> I think it's OK according to the ISA since it doesn't modify any special registers or do anything special for NaN/Inf. The description just says that it copies the contents with the high bit of each word element complemented, so I think this is just a bitwise operation rather than a vector fp operation.
As far as I tested, it works at least on POWER9.


https://reviews.llvm.org/D45522