[llvm] r330148 - [RISCV] Fix assert message operator

[Mandeep Singh Grang via llvm-commits]

Author: mgrang
Date: Mon Apr 16 11:56:10 2018
New Revision: 330148

URL: http://llvm.org/viewvc/llvm-project?rev=330148&view=rev
Log:
[RISCV] Fix assert message operator

Summary:
Specifying assert message with an || operator makes the compiler interpret it
 as a bool. Changed it to &&.

Reviewers: asb, apazos

Reviewed By: asb

Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, llvm-commits

Differential Revision: https://reviews.llvm.org/D45660

Modified:
    llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp

Modified: llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp?rev=330148&r1=330147&r2=330148&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp Mon Apr 16 11:56:10 2018
@@ -658,7 +658,7 @@ static bool CC_RISCV(const DataLayout &D
 
   // Handle passing f64 on RV32D with a soft float ABI.
   if (XLen == 32 && ValVT == MVT::f64) {
-    assert(!ArgFlags.isSplit() && PendingLocs.empty() ||
+    assert(!ArgFlags.isSplit() && PendingLocs.empty() &&
            "Can't lower f64 if it is split");
     // Depending on available argument GPRS, f64 may be passed in a pair of
     // GPRs, split between a GPR and the stack, or passed completely on the