[PATCH] D45689: [AArch64][SVE] Added GPR64shifted and GPR64NoXZRshifted register classes.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen created this revision.
sdesmalen added reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro.
Herald added subscribers: kristof.beyls, tschuett.

This is patch [3/4] in a series to add assembler/disassembler support for
SVE's contiguous LD1 (scalar+scalar) instructions.


https://reviews.llvm.org/D45689

Files:
  lib/Target/AArch64/AArch64RegisterInfo.td
  lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
  lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
  lib/Target/AArch64/InstPrinter/AArch64InstPrinter.h

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D45689.142631.patch
Type: text/x-patch
Size: 8048 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180416/a7a8d078/attachment.bin>