[PATCH] D41949: [RISCV] implement li pseudo instruction

Sameer AbuAsal via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 13 18:58:57 PDT 2018


sabuasal added inline comments.


================
Comment at: lib/Target/RISCV/RISCVAsmPrinter.cpp:74
+    const MachineOperand &ImmOp = MI->getOperand(1);
+    emitRISCVLoadImm(DstRegOp.getReg(), ImmOp.getImm(), *OutStreamer,
+                     &getSubtargetInfo());
----------------
niosHD wrote:
> apazos wrote:
> > can't we return the new instruction from this function and reuse the EmitToStreamer call below.  This way we reduce the places to insert compression calls, when instruction compression at MC level is enabled.
> Theoretically yes, but isn't compression done in the `EmitInstruction` of the streamer?
> 
> The code here is basically a custom MI to MC lowering. It uses the same `EmitInstruction` function which is also used by the generated `emitPseudoExpansionLowering` internally. Maybe I miss something but assuming that the MC compression works in conjunction with pseudo expansion I expect that it also works for the current code.
> 
I believe I addressed this in my other comment but I actually just saw this comment you had!


The way "emitPseudoExpansionLowering" emits the instruction is  "EmitToStreamer(OutStreamer, TmpInst);". This way it preserves any behavior in the XXXASMPrinter it is called from.   You can check that in any inc file "XXXXGenMCPseudoLowering.inc"


https://reviews.llvm.org/D41949





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