[PATCH] D45432: [AArch64][SVE] Asm: Support for contiguous ST1 (scalar+imm) store instructions.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


================
Comment at: lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:3121
+    // See if this is a "mul vl" decoration used by SVE instructions.
+    if (!parseOptionalMulVl(Operands))
+      return false;
----------------
rengolin wrote:
> So mul vl is exclusive with shift or extend? I ask because you return if you find it. 
Correct, they are mutually exclusive.


https://reviews.llvm.org/D45432