[PATCH] D44675: [ARM] Codegen FP16 vmaxnm/vminnm scalar instructions

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer updated this revision to Diff 142178.
SjoerdMeijer added a comment.

> Could you school an FP noob and explain why we don't expect two min instructions?

The VMINNM and VMAXNM variants handles NaNs in consistence with the IEEE754-2008 spec, the variants without NM apparently not.

Long story short, the initial selection dag of the "safe" tests contain nodes:

  t14: f16 = fminnum t10, ConstantFP:f16<APFloat(18944)>
    t18: f16 = fminnan t14, ConstantFP:f16<APFloat(20544)>

whereas the "fast math" tests contain:

  t14: f16 = fminnum t10, ConstantFP:f16<APFloat(18944)>
    t24: f16 = fminnum t14, ConstantFP:f16<APFloat(20544)>

as the "safe" test contains 1 fminnum node and 1 fminnan, we expect only 1 vminnm.


https://reviews.llvm.org/D44675

Files:
  lib/Target/ARM/ARMISelLowering.cpp
  lib/Target/ARM/ARMInstrNEON.td
  lib/Target/ARM/ARMInstrVFP.td
  test/CodeGen/ARM/fp16-instructions.ll
  test/CodeGen/ARM/fp16-vminmaxnm-safe.ll
  test/CodeGen/ARM/fp16-vminmaxnm.ll

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