[PATCH] D45204: [X86][MIPS][ARM] New machine instruction property 'isMoveReg'

[Nikola Prica via Phabricator via llvm-commits]

NikolaPrica updated this revision to Diff 142147.
NikolaPrica marked an inline comment as not done.
NikolaPrica added a comment.

Thank you for your reviews and expertise @efriedma and @craig.topper !

@craig.topper I wasnt sure wich instructions could be considered as "move register to register" so I've just tagged some of the instructions from copyPhysReg method.

In this new diff I've changed the following:
-Added isMoveReg for table definiton class avx512_mask_mov_gpr ???
-Remove disabling flags for KMOVB and KMOVD
-Added isMoveReg for table definiton class avx512_load and avx512_store for "def rr" and "def rr_REV"
-Tagged MOV*rr_REV instructions as isMoveReg
-Tagged MMX_MOVQ64rr_REV as isMoveReg
-Added isMoveReg for table definition class sse12_mov_packed for "def rr"
-Tagged VMOVAP[S|D][Y]rr_REV, VMOVUP[S|D][Y]rr_REV, MOVAP[S|D]rr_REV and MOVUP[S|D]rr_REV as isMoveREg ???


https://reviews.llvm.org/D45204

Files:
  include/llvm/CodeGen/MachineInstr.h
  include/llvm/CodeGen/TargetInstrInfo.h
  include/llvm/MC/MCInstrDesc.h
  include/llvm/Target/Target.td
  lib/Target/ARM/ARMBaseInstrInfo.cpp
  lib/Target/ARM/ARMBaseInstrInfo.h
  lib/Target/ARM/ARMInstrInfo.td
  lib/Target/ARM/ARMInstrThumb.td
  lib/Target/ARM/ARMInstrVFP.td
  lib/Target/Mips/MicroMipsDSPInstrInfo.td
  lib/Target/Mips/MicroMipsInstrFPU.td
  lib/Target/Mips/MicroMipsInstrInfo.td
  lib/Target/Mips/Mips16InstrInfo.td
  lib/Target/Mips/Mips64InstrInfo.td
  lib/Target/Mips/MipsDSPInstrInfo.td
  lib/Target/Mips/MipsInstrFPU.td
  lib/Target/Mips/MipsInstrInfo.td
  lib/Target/Mips/MipsMSAInstrInfo.td
  lib/Target/Mips/MipsSEInstrInfo.cpp
  lib/Target/Mips/MipsSEInstrInfo.h
  lib/Target/X86/X86InstrAVX512.td
  lib/Target/X86/X86InstrInfo.td
  lib/Target/X86/X86InstrMMX.td
  lib/Target/X86/X86InstrSSE.td
  utils/TableGen/CodeGenInstruction.cpp
  utils/TableGen/CodeGenInstruction.h
  utils/TableGen/InstrInfoEmitter.cpp

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