[llvm] r329899 - [RISCV] Change function alignment to 4 bytes, and 2 bytes for RVC

[Shiva Chen via llvm-commits]

Author: shiva
Date: Thu Apr 12 04:30:59 2018
New Revision: 329899

URL: http://llvm.org/viewvc/llvm-project?rev=329899&view=rev
Log:
[RISCV] Change function alignment to 4 bytes, and 2 bytes for RVC

Summary:

According RISC-V ELF psABI specification, base RV32 and RV64 ISAs only
allow 32-bit instruction alignment, but instruction allow to be aligned
to 16-bit boundaries for C-extension.

So we just align to 4 bytes and 2 bytes for C-extension is enough.

Reviewers: asb, apazos

Differential Revision: https://reviews.llvm.org/D45560

Patch by Kito Cheng.

Added:
    llvm/trunk/test/CodeGen/RISCV/align.ll
Modified:
    llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp

Modified: llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp?rev=329899&r1=329898&r2=329899&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp Thu Apr 12 04:30:59 2018
@@ -142,8 +142,9 @@ RISCVTargetLowering::RISCVTargetLowering
   setBooleanContents(ZeroOrOneBooleanContent);
 
   // Function alignments (log2).
-  setMinFunctionAlignment(3);
-  setPrefFunctionAlignment(3);
+  unsigned FunctionAlignment = Subtarget.hasStdExtC() ? 1 : 2;
+  setMinFunctionAlignment(FunctionAlignment);
+  setPrefFunctionAlignment(FunctionAlignment);
 
   // Effectively disable jump table generation.
   setMinimumJumpTableEntries(INT_MAX);

Added: llvm/trunk/test/CodeGen/RISCV/align.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/RISCV/align.ll?rev=329899&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/RISCV/align.ll (added)
+++ llvm/trunk/test/CodeGen/RISCV/align.ll Thu Apr 12 04:30:59 2018
@@ -0,0 +1,13 @@
+; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
+; RUN:   | FileCheck %s -check-prefix=RV32I
+; RUN: llc -mtriple=riscv32 -mattr=+c -verify-machineinstrs < %s \
+; RUN:   | FileCheck %s -check-prefix=RV32C
+
+define void @foo() {
+;RV32I: .p2align 2
+;RV32I: foo:
+;RV32C: .p2align 1
+;RV32C: foo:
+entry:
+  ret void
+}