[PATCH] D45022: [X86] Mark all byval parameters as aliased

Jeremy Morse via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 10 02:58:48 PDT 2018


jmorse updated this revision to Diff 141811.
jmorse added a reviewer: craig.topper.
jmorse added a comment.

Added regression test and craig.topper as reviewer; Hi Craig, this is a fix for https://bugs.llvm.org/show_bug.cgi?id=30290 which has gone quiet. The tl;dr is that without isAliased=true for byval argument stack slots, the instruction scheduler doesn't know the byval stack slot is aliased by an IR Value, and can illegally re-order frameindex-based and Value-based memory accesses of the same location, as demonstrated in PR and added regression test.


https://reviews.llvm.org/D45022

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/pr30290.ll

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