[llvm] r329591 - AMDGPU: enable 128-bit for local addr space under an option
Olsak, Marek via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 9 14:05:07 PDT 2018
The commit fixes a problem with the amdgpu backend.
I didn't see any build failure on my machine, and I don't plan to build clang because it's not in the LLVM tree nor is it required for amdgpu.
Thanks,
Marek
________________________________
From: Aleksey Shlyapnikov <alekseys at google.com>
Sent: Monday, April 9, 2018 3:51:32 PM
To: Sean Fertile
Cc: Olsak, Marek; llvm-commits
Subject: Re: [llvm] r329591 - AMDGPU: enable 128-bit for local addr space under an option
Reverted, r329610
On Mon, Apr 9, 2018 at 12:10 PM, Sean Fertile <sfertile at ca.ibm.com<mailto:sfertile at ca.ibm.com>> wrote:
Seeing the same failures on a number of the PowerPC build bots as well:
http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/17374
http://lab.llvm.org:8011/builders/clang-ppc64le-linux/builds/15992
http://lab.llvm.org:8011/builders/clang-ppc64be-linux-lnt
http://lab.llvm.org:8011/builders/clang-ppc64le-linux-lnt/builds/11251
----- Original message -----
From: Aleksey Shlyapnikov via llvm-commits <llvm-commits at lists.llvm.org<mailto:llvm-commits at lists.llvm.org>>
Sent by: "llvm-commits" <llvm-commits-bounces at lists.llvm.org<mailto:llvm-commits-bounces at lists.llvm.org>>
To: Marek Olsak <marek.olsak at amd.com<mailto:marek.olsak at amd.com>>
Cc: llvm-commits <llvm-commits at lists.llvm.org<mailto:llvm-commits at lists.llvm.org>>
Subject: Re: [llvm] r329591 - AMDGPU: enable 128-bit for local addr space under an option
Date: Mon, Apr 9, 2018 2:10 PM
Here's another one: http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/9495<https://urldefense.proofpoint.com/v2/url?u=http-3A__lab.llvm.org-3A8011_builders_clang-2Dx86-5F64-2Ddebian-2Dfast_builds_9495&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=1YnPtk3HtYEpDZk-vTlsNPq5471jOT5AdFe_XQowYAM&e=>
On Mon, Apr 9, 2018 at 10:37 AM, Aleksey Shlyapnikov <alekseys at google.com<mailto:alekseys at google.com>> wrote:
It seems that at least one bot is unhappy about this change: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/16516<https://urldefense.proofpoint.com/v2/url?u=http-3A__lab.llvm.org-3A8011_builders_sanitizer-2Dx86-5F64-2Dlinux-2Dfast_builds_16516&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=d0BxYvhHJkBlpHbgMyWBQPj77AKVTbrZApOJARfAqxk&e=>
On Mon, Apr 9, 2018 at 9:56 AM, Marek Olsak via llvm-commits <llvm-commits at lists.llvm.org<mailto:llvm-commits at lists.llvm.org>> wrote:
Author: mareko
Date: Mon Apr 9 09:56:32 2018
New Revision: 329591
URL: http://llvm.org/viewvc/llvm-project?rev=329591&view=rev<https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject-3Frev-3D329591-26view-3Drev&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=uppnpLNtlwsKDBTw2srbs-HGnUOp98M03kzNG0my3I8&e=>
Log:
AMDGPU: enable 128-bit for local addr space under an option
Author: Samuel Pitoiset
ds_read_b128 and ds_write_b128 have been recently enabled
under the amdgpu-ds128 option because the performance benefit
is unclear.
Though, using 128-bit loads/stores for the local address space
appears to introduce regressions in tessellation shaders. Not
sure what is broken, but as ds_read_b128/ds_write_b128 are not
enabled by default, just introduce a global option and enable
128-bit only if requested (until it's fixed/used correctly).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464<https://urldefense.proofpoint.com/v2/url?u=https-3A__bugs.freedesktop.org_show-5Fbug.cgi-3Fid-3D105464&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=mWOcLWQ37HSNF5Xjm9hQnnMnFjPwQvUKuduKD7v_iaI&e=>
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPU.td
llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h
llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/trunk/test/CodeGen/AMDGPU/load-local-f32.ll
llvm/trunk/test/CodeGen/AMDGPU/load-local-f64.ll
llvm/trunk/test/CodeGen/AMDGPU/load-local-i16.ll
llvm/trunk/test/CodeGen/AMDGPU/load-local-i32.ll
llvm/trunk/test/CodeGen/AMDGPU/load-local-i64.ll
llvm/trunk/test/CodeGen/AMDGPU/load-local-i8.ll
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPU.td?rev=329591&r1=329590&r2=329591&view=diff<https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_AMDGPU_AMDGPU.td-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=S1yx_Z2TyfECvqNqy5E6-yY7yb4tpzaDEL708DOP70o&e=>
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPU.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPU.td Mon Apr 9 09:56:32 2018
@@ -426,6 +426,12 @@ def FeatureEnableSIScheduler : Subtarget
"Enable SI Machine Scheduler"
>;
+def FeatureEnableDS128 : SubtargetFeature<"enable-ds128",
+ "EnableDS128",
+ "true",
+ "Use ds_{read|write}_b128"
+>;
+
// Unless +-flat-for-global is specified, turn on FlatForGlobal for
// all OS-es on VI and newer hardware to avoid assertion failures due
// to missing ADDR64 variants of MUBUF instructions.
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp?rev=329591&r1=329590&r2=329591&view=diff<https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_AMDGPU_AMDGPUSubtarget.cpp-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=glXA2WN4zyRXLoDB9YvkGQIVw1mGq4ZCOTCkZtocpCg&e=>
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.cpp Mon Apr 9 09:56:32 2018
@@ -132,6 +132,7 @@ AMDGPUSubtarget::AMDGPUSubtarget(const T
EnableLoadStoreOpt(false),
EnableUnsafeDSOffsetFolding(false),
EnableSIScheduler(false),
+ EnableDS128(false),
DumpCode(false),
FP64(false),
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h?rev=329591&r1=329590&r2=329591&view=diff<https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_AMDGPU_AMDGPUSubtarget.h-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=cT3BKoDCAjbWwDP6hoT8CPFvJ-pK5XFfO52nGKwKCpM&e=>
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUSubtarget.h Mon Apr 9 09:56:32 2018
@@ -133,6 +133,7 @@ protected:
bool EnableLoadStoreOpt;
bool EnableUnsafeDSOffsetFolding;
bool EnableSIScheduler;
+ bool EnableDS128;
bool DumpCode;
// Subtarget statically properties set by tablegen
@@ -412,8 +413,8 @@ public:
/// \returns If target supports ds_read/write_b128 and user enables generation
/// of ds_read/write_b128.
- bool useDS128(bool UserEnable) const {
- return CIInsts && UserEnable;
+ bool useDS128() const {
+ return CIInsts && EnableDS128;
}
/// \returns If MUBUF instructions always perform range checking, even for
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp?rev=329591&r1=329590&r2=329591&view=diff<https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_AMDGPU_AMDGPUTargetTransformInfo.cpp-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=hAdbzwHqVxbsrCfLd5tOp-WSamczYGs2vZwcsJLbPPs&e=>
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp Mon Apr 9 09:56:32 2018
@@ -265,11 +265,13 @@ unsigned AMDGPUTTIImpl::getLoadStoreVecR
return 512;
}
- if (AddrSpace == AS.FLAT_ADDRESS ||
- AddrSpace == AS.LOCAL_ADDRESS ||
- AddrSpace == AS.REGION_ADDRESS)
+ if (AddrSpace == AS.FLAT_ADDRESS)
return 128;
+ if (AddrSpace == AS.LOCAL_ADDRESS ||
+ AddrSpace == AS.REGION_ADDRESS)
+ return ST->useDS128() ? 128 : 64;
+
if (AddrSpace == AS.PRIVATE_ADDRESS)
return 8 * ST->getMaxPrivateElementSize();
Modified: llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp?rev=329591&r1=329590&r2=329591&view=diff<https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_lib_Target_AMDGPU_SIISelLowering.cpp-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=evY3u2DvGCjraWUyb-B7CsrXDeSIo7KtBbSZFbuwCsc&e=>
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp Mon Apr 9 09:56:32 2018
@@ -94,11 +94,6 @@ static cl::opt<bool> EnableVGPRIndexMode
cl::desc("Use GPR indexing mode instead of movrel for vector indexing"),
cl::init(false));
-static cl::opt<bool> EnableDS128(
- "amdgpu-ds128",
- cl::desc("Use DS_read/write_b128"),
- cl::init(false));
-
static cl::opt<unsigned> AssumeFrameIndexHighZeroBits(
"amdgpu-frame-index-zero-bits",
cl::desc("High bits of frame index assumed to be zero"),
@@ -5300,7 +5295,7 @@ SDValue SITargetLowering::LowerLOAD(SDVa
}
} else if (AS == AMDGPUASI.LOCAL_ADDRESS) {
// Use ds_read_b128 if possible.
- if (Subtarget->useDS128(EnableDS128) && Load->getAlignment() >= 16 &&
+ if (Subtarget->useDS128() && Load->getAlignment() >= 16 &&
MemVT.getStoreSize() == 16)
return SDValue();
@@ -5703,7 +5698,7 @@ SDValue SITargetLowering::LowerSTORE(SDV
}
} else if (AS == AMDGPUASI.LOCAL_ADDRESS) {
// Use ds_write_b128 if possible.
- if (Subtarget->useDS128(EnableDS128) && Store->getAlignment() >= 16 &&
+ if (Subtarget->useDS128() && Store->getAlignment() >= 16 &&
VT.getStoreSize() == 16)
return SDValue();
Modified: llvm/trunk/test/CodeGen/AMDGPU/load-local-f32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/load-local-f32.ll?rev=329591&r1=329590&r2=329591&view=diff<https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_AMDGPU_load-2Dlocal-2Df32.ll-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=b6eEQFv_AOJXWAXNPkeFOfOaw4U2-GZwLcb7XCOPGL0&e=>
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/load-local-f32.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/load-local-f32.ll Mon Apr 9 09:56:32 2018
@@ -3,9 +3,9 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s
; Testing for ds_read/write_128
-; RUN: llc -march=amdgcn -mcpu=tahiti -amdgpu-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s
-; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
-; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
+; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
; FUNC-LABEL: {{^}}load_f32_local:
; SICIVI: s_mov_b32 m0
Modified: llvm/trunk/test/CodeGen/AMDGPU/load-local-f64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/load-local-f64.ll?rev=329591&r1=329590&r2=329591&view=diff<https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_AMDGPU_load-2Dlocal-2Df64.ll-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=nv-eRBhJ92Mc2j-Nzcy1oqtUqZ98S21G53BOioVefno&e=>
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/load-local-f64.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/load-local-f64.ll Mon Apr 9 09:56:32 2018
@@ -5,8 +5,8 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s
; Testing for ds_read_b128
-; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
-; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
+; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
; FUNC-LABEL: {{^}}local_load_f64:
; SICIV: s_mov_b32 m0
Modified: llvm/trunk/test/CodeGen/AMDGPU/load-local-i16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/load-local-i16.ll?rev=329591&r1=329590&r2=329591&view=diff<https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_AMDGPU_load-2Dlocal-2Di16.ll-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=NoJhnssC9Ub6oCzFgJPBMp1UByUnVZML6bpPIeI4iys&e=>
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/load-local-i16.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/load-local-i16.ll Mon Apr 9 09:56:32 2018
@@ -4,8 +4,8 @@
; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; Testing for ds_read/write_b128
-; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
-; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
+; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
; FUNC-LABEL: {{^}}local_load_i16:
; GFX9-NOT: m0
Modified: llvm/trunk/test/CodeGen/AMDGPU/load-local-i32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/load-local-i32.ll?rev=329591&r1=329590&r2=329591&view=diff<https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_AMDGPU_load-2Dlocal-2Di32.ll-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=Ft1bPglUP6igofQXmSCW1ik6x_JMy26WFmBuE-Tm-II&e=>
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/load-local-i32.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/load-local-i32.ll Mon Apr 9 09:56:32 2018
@@ -4,9 +4,9 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; Testing for ds_read/write_128
-; RUN: llc -march=amdgcn -mcpu=tahiti -amdgpu-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s
-; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
-; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
+; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
; FUNC-LABEL: {{^}}local_load_i32:
; GCN-NOT: s_wqm_b64
Modified: llvm/trunk/test/CodeGen/AMDGPU/load-local-i64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/load-local-i64.ll?rev=329591&r1=329590&r2=329591&view=diff<https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_AMDGPU_load-2Dlocal-2Di64.ll-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=GCb8UEh1OZqAVn1paqsnzTMDBn-sDqWVLM3zVH3-B5g&e=>
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/load-local-i64.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/load-local-i64.ll Mon Apr 9 09:56:32 2018
@@ -5,8 +5,8 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s
; Testing for ds_read/write_b128
-; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
-; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
+; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
; FUNC-LABEL: {{^}}local_load_i64:
; SICIVI: s_mov_b32 m0
Modified: llvm/trunk/test/CodeGen/AMDGPU/load-local-i8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/load-local-i8.ll?rev=329591&r1=329590&r2=329591&view=diff<https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.org_viewvc_llvm-2Dproject_llvm_trunk_test_CodeGen_AMDGPU_load-2Dlocal-2Di8.ll-3Frev-3D329591-26r1-3D329590-26r2-3D329591-26view-3Ddiff&d=DwMFaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=vE89RddfSAMwAmW9D-c51sqQCl8tXHenTEyBrBeQeeA&m=M3Qlnq6oX6F8iz_v8v-BzwtvrR_F-ISPWPYBFBpviCU&s=YWjWjWFunygvvcG9TTz4rPZnoAMx4ehscSTeZ-Kz5gw&e=>
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/load-local-i8.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/load-local-i8.ll Mon Apr 9 09:56:32 2018
@@ -4,8 +4,8 @@
; RUN: llc -march=r600 -mtriple=r600---amdgiz -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; Testing for ds_read/write_b128
-; RUN: llc -march=amdgcn -mcpu=tonga -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
-; RUN: llc -march=amdgcn -mcpu=gfx900 -amdgpu-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
+; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
; FUNC-LABEL: {{^}}local_load_i8:
; GCN-NOT: s_wqm_b64
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