[llvm] r329556 - [X86][SSE] Fix f32 mul/div itinerary groups typo

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Mon Apr  9 03:45:53 2018
New Revision: 329556

URL: http://llvm.org/viewvc/llvm-project?rev=329556&view=rev
Log:
[X86][SSE] Fix f32 mul/div itinerary groups typo

The RM folded itineraries were incorrectly using the f64 version.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrSSE.td
    llvm/trunk/test/CodeGen/X86/sse-schedule.ll

Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=329556&r1=329555&r2=329556&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Mon Apr  9 03:45:53 2018
@@ -56,7 +56,7 @@ def SSE_ALU_ITINS_S : SizeItins<
 
 let Sched = WriteFMul in {
 def SSE_MUL_F32S : OpndItins<
-  IIC_SSE_MUL_F32S_RR, IIC_SSE_MUL_F64S_RM
+  IIC_SSE_MUL_F32S_RR, IIC_SSE_MUL_F32S_RM
 >;
 
 def SSE_MUL_F64S : OpndItins<
@@ -70,7 +70,7 @@ def SSE_MUL_ITINS_S : SizeItins<
 
 let Sched = WriteFDiv in {
 def SSE_DIV_F32S : OpndItins<
-  IIC_SSE_DIV_F32S_RR, IIC_SSE_DIV_F64S_RM
+  IIC_SSE_DIV_F32S_RR, IIC_SSE_DIV_F32S_RM
 >;
 
 def SSE_DIV_F64S : OpndItins<
@@ -99,7 +99,7 @@ def SSE_ALU_ITINS_P : SizeItins<
 
 let Sched = WriteFMul in {
 def SSE_MUL_F32P : OpndItins<
-  IIC_SSE_MUL_F32P_RR, IIC_SSE_MUL_F64P_RM
+  IIC_SSE_MUL_F32P_RR, IIC_SSE_MUL_F32P_RM
 >;
 
 def SSE_MUL_F64P : OpndItins<
@@ -113,7 +113,7 @@ def SSE_MUL_ITINS_P : SizeItins<
 
 let Sched = WriteFDiv in {
 def SSE_DIV_F32P : OpndItins<
-  IIC_SSE_DIV_F32P_RR, IIC_SSE_DIV_F64P_RM
+  IIC_SSE_DIV_F32P_RR, IIC_SSE_DIV_F32P_RM
 >;
 
 def SSE_DIV_F64P : OpndItins<

Modified: llvm/trunk/test/CodeGen/X86/sse-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-schedule.ll?rev=329556&r1=329555&r2=329556&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-schedule.ll Mon Apr  9 03:45:53 2018
@@ -1730,7 +1730,7 @@ define <4 x float> @test_divps(<4 x floa
 ; ATOM-LABEL: test_divps:
 ; ATOM:       # %bb.0:
 ; ATOM-NEXT:    divps %xmm1, %xmm0 # sched: [70:35.00]
-; ATOM-NEXT:    divps (%rdi), %xmm0 # sched: [125:62.50]
+; ATOM-NEXT:    divps (%rdi), %xmm0 # sched: [70:35.00]
 ; ATOM-NEXT:    retq # sched: [79:39.50]
 ;
 ; SLM-LABEL: test_divps:
@@ -1838,7 +1838,7 @@ define float @test_divss(float %a0, floa
 ; ATOM-LABEL: test_divss:
 ; ATOM:       # %bb.0:
 ; ATOM-NEXT:    divss %xmm1, %xmm0 # sched: [34:17.00]
-; ATOM-NEXT:    divss (%rdi), %xmm0 # sched: [62:31.00]
+; ATOM-NEXT:    divss (%rdi), %xmm0 # sched: [34:17.00]
 ; ATOM-NEXT:    retq # sched: [79:39.50]
 ;
 ; SLM-LABEL: test_divss:
@@ -3625,7 +3625,7 @@ define <4 x float> @test_mulps(<4 x floa
 ; ATOM-LABEL: test_mulps:
 ; ATOM:       # %bb.0:
 ; ATOM-NEXT:    mulps %xmm1, %xmm0 # sched: [5:5.00]
-; ATOM-NEXT:    mulps (%rdi), %xmm0 # sched: [10:5.00]
+; ATOM-NEXT:    mulps (%rdi), %xmm0 # sched: [5:5.00]
 ; ATOM-NEXT:    retq # sched: [79:39.50]
 ;
 ; SLM-LABEL: test_mulps:
@@ -3733,7 +3733,7 @@ define float @test_mulss(float %a0, floa
 ; ATOM-LABEL: test_mulss:
 ; ATOM:       # %bb.0:
 ; ATOM-NEXT:    mulss %xmm1, %xmm0 # sched: [4:4.00]
-; ATOM-NEXT:    mulss (%rdi), %xmm0 # sched: [5:5.00]
+; ATOM-NEXT:    mulss (%rdi), %xmm0 # sched: [4:4.00]
 ; ATOM-NEXT:    retq # sched: [79:39.50]
 ;
 ; SLM-LABEL: test_mulss: