[PATCH] D45385: [RISCV] Tablegen-driven Instruction Compression.

[Sameer AbuAsal via Phabricator via llvm-commits]

sabuasal updated this revision to Diff 141401.

https://reviews.llvm.org/D45385

Files:
  include/llvm/MC/MCInst.h
  lib/MC/MCInst.cpp
  lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  lib/Target/RISCV/CMakeLists.txt
  lib/Target/RISCV/InstPrinter/RISCVInstPrinter.cpp
  lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
  lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
  lib/Target/RISCV/RISCVAsmPrinter.cpp
  lib/Target/RISCV/RISCVInstrInfo.td
  lib/Target/RISCV/RISCVInstrInfoC.td
  test/CodeGen/RISCV/alu32.ll
  test/CodeGen/RISCV/branch.ll
  test/CodeGen/RISCV/compress-Pseudo.ll
  test/CodeGen/RISCV/compress-inline-asm.ll
  test/MC/RISCV/cnop.s
  test/MC/RISCV/compress-cjal.s
  test/MC/RISCV/compress-rv32d.s
  test/MC/RISCV/compress-rv32f.s
  test/MC/RISCV/compress-rv32i.s
  test/MC/RISCV/compress-rv64i.s
  test/MC/RISCV/compressed-relocations.s
  test/MC/RISCV/fixups-compressed.s
  test/MC/RISCV/relocations.s
  test/MC/RISCV/rv32-relaxation.s
  test/MC/RISCV/rv64-relaxation.s
  utils/TableGen/CMakeLists.txt
  utils/TableGen/RISCVCompressInstEmitter.cpp
  utils/TableGen/TableGen.cpp
  utils/TableGen/TableGenBackends.h

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