[llvm] r329425 - Add additional tests from D45366

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Fri Apr  6 10:15:56 2018
New Revision: 329425

URL: http://llvm.org/viewvc/llvm-project?rev=329425&view=rev
Log:
Add additional tests from D45366

Modified:
    llvm/trunk/test/CodeGen/Generic/expand-experimental-reductions.ll

Modified: llvm/trunk/test/CodeGen/Generic/expand-experimental-reductions.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/expand-experimental-reductions.ll?rev=329425&r1=329424&r2=329425&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Generic/expand-experimental-reductions.ll (original)
+++ llvm/trunk/test/CodeGen/Generic/expand-experimental-reductions.ll Fri Apr  6 10:15:56 2018
@@ -110,6 +110,17 @@ entry:
   ret float %r
 }
 
+define float @fadd_f32_strict_accum(float %accum, <4 x float> %vec) {
+; CHECK-LABEL: @fadd_f32_strict_accum(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[R:%.*]] = call float @llvm.experimental.vector.reduce.fadd.f32.f32.v4f32(float [[ACCUM:%.*]], <4 x float> [[VEC:%.*]])
+; CHECK-NEXT:    ret float [[R]]
+;
+entry:
+  %r = call float @llvm.experimental.vector.reduce.fadd.f32.v4f32(float %accum, <4 x float> %vec)
+  ret float %r
+}
+
 define float @fmul_f32(<4 x float> %vec) {
 ; CHECK-LABEL: @fmul_f32(
 ; CHECK-NEXT:  entry:
@@ -125,6 +136,28 @@ entry:
   ret float %r
 }
 
+define float @fmul_f32_strict(<4 x float> %vec) {
+; CHECK-LABEL: @fmul_f32_strict(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[R:%.*]] = call float @llvm.experimental.vector.reduce.fmul.f32.f32.v4f32(float undef, <4 x float> [[VEC:%.*]])
+; CHECK-NEXT:    ret float [[R]]
+;
+entry:
+  %r = call float @llvm.experimental.vector.reduce.fmul.f32.v4f32(float undef, <4 x float> %vec)
+  ret float %r
+}
+
+define float @fmul_f32_strict_accum(float %accum, <4 x float> %vec) {
+; CHECK-LABEL: @fmul_f32_strict_accum(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[R:%.*]] = call float @llvm.experimental.vector.reduce.fmul.f32.f32.v4f32(float [[ACCUM:%.*]], <4 x float> [[VEC:%.*]])
+; CHECK-NEXT:    ret float [[R]]
+;
+entry:
+  %r = call float @llvm.experimental.vector.reduce.fmul.f32.v4f32(float %accum, <4 x float> %vec)
+  ret float %r
+}
+
 define i64 @smax_i64(<2 x i64> %vec) {
 ; CHECK-LABEL: @smax_i64(
 ; CHECK-NEXT:  entry: